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&(3人收藏)Agilent | Agilent Technologies Announces Expanded RF/Mixed-Signal Simulation Coverage for Wireless Communications IC Design
Agilent Technologies Announces Expanded RF/Mixed-Signal Simulation Coverage for Wireless Communications IC Design
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SANTA CLARA, Calif., April 22, 2008
Agilent Technologies Inc. (NYSE: A) today announced the release of the latest version of its RFIC simulation software, GoldenGate. This release represents an expansion in RFIC simulation coverage for wireless communications products, with 5x transient simulation speed improvements and new mixed-signal simulation capabilities, resulting in shorter product development times.
"RFIC designers have limited simulation coverage today -- simulating a fraction of what they need to before the tape-out deadline," said Marc Petersen, product marketing manager with Agilent's EEsof EDA division. "They are missing design problems and incurring costly re-spins. GoldenGate 4.2 enables more simulation coverage with increased speed and capacity, and takes advantage of new ways to uncover RF/mixed-signal problems early in the design cycle."
In RFIC design, transient (SPICE) simulations provide time-domain results. GoldenGate 4.2 features improvements to transient simulations, achieving faster speeds of 2x to 4x on single-core computers and typically 5x for quad-core computers. The transient improvements also help speed up the frequency-domain simulation process. Faster simulations allow for more extensive use of statistical design throughout the RFIC design cycle, without compromising tight development schedules.
Digital State Sweeping (DSS), a new GoldenGate 4.2 feature, provides an automated solution to the problem of sweeping an RF design through its many digital control states. Performing the sweep manually is a tedious simulation task. DSS automates operational verification of the control states and provides interface and connectivity testing as well as digital-RF connectivity debugging, allowing digital and RF teams to work concurrently.
Agilent's GoldenGate 4.2 also includes:
the ability to perform mixed-signal simulations on a combination of RF and digital circuits represented by Verilog-AMS
new wireless sources from the Agilent Ptolemy simulator, including transmit/receive waveforms for 802.11(WiFi), 802.16 (WiMAX(tm)/WiMAN), TDSCMDA, 3GPPFDD, and custom, user-defined wireless sources,
improved Monte Carlo algorithms (Latin Hypercube Sampling and Hammersley Sequence Sampling) for faster Monte Carlo coverage with 5-10x fewer trials.
Agilent's GoldenGate software is an advanced simulation and analysis solution for integrated RFIC design. Its unique simulation algorithms are optimized for the challenging demands of today's complex RFIC design, enabling full characterization of complete transceivers prior to tape-out. To ensure device manufacturability and reduce design spins, GoldenGate takes advantage of both frequency-domain and time-domain simulation capabilities to perform necessary analyses on today's mixed-signal RFICs.
For more information about GoldenGate visit .
To request a demo of GoldenGate, visit .
A high-resolution screen image of Agilent's GoldenGate software is available at .
U.S. Pricing and Availability
Agilent's GoldenGate Release 4.2 is expected to be available in early May, with prices starting at approximately $42,000.
About Agilent EEsof EDA Software
Agilent EEsof EDA is an industry-leading provider of RF-mixed signal circuit and system-design software. Agilent EEsof EDA software is compatible with and is used to design the company's test and measurement equipment. Additional information is available at .
About Agilent Technologies
Agilent Technologies Inc. (NYSE: A) is the world's premier measurement company and a technology leader in communications, electronics, life sciences and chemical analysis. The company's 19,000 employees serve customers in more than 110 countries. Agilent had net revenue of $5.4 billion in fiscal year 2007. Information about Agilent is available on the Web at .
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Janet Smith
+1 970 679 5397你的位置：
【2个博士职位】Analog/Mixed-signal IC design方向，屯特大学
有没有ME的master同学对这个职位感兴趣？是Analog/mixed-signal ICdesign的方向，具体内容见附件。
需要说明的是，这个博士职位的项目是个欧盟项目，最近接到通知，此项目内不允许伊朗学生参加。。。
本来我们都已经选出了candidates（都是伊朗人），并且回绝了其他应聘者，结果6月1号项目一开始就收到不要伊朗人的通知。。。
悲剧啊，又得从头来，而且要在暑假后就要上班，时间比较急。。。( 18:13:31, Size: 25.3 KB, Downloads: 286)
PS: 最近Analog/Mixed-signal方向的学生是不是越来越少了？？[attach]447855[/attach]IC Technologies for Mixed-Signal and RF SiP_百度文库
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IC Technologies for Mixed-Signal and RF SiP
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物联网兴起 IC设计面临Mixed Signal严峻挑战
来源：新电子
作者：日 09:51
[导读] 物联网（IoT）应用兴起，除为半导体厂开创新的市场商机外，亦带来诸多积体电路（IC）设计新挑战，特别是系统单芯片（SoC）功能整合度愈来愈高，已使IC设计业者面临更严峻的数位和类比混合讯号（Mixed Signal）电路验证（Verification）挑战。
　　物联网（IoT）应用兴起，除为半导体厂开创新的市场商机外，亦带来诸多积体电路（IC）设计新挑战，特别是系统单芯片（SoC）功能整合度愈来愈高，已使IC设计业者面临更严峻的数位和类比混合讯号（Mixed Signal）电路验证（Verification）挑战。
　　Cadence全球营运暨系统和验证事业群执行副总裁黄小立表示，近年来亚太区芯片设计公司对验证工具的需求已显著攀升。
　　益华电脑（Cadence）全球营运暨系统和验证事业群执行副总裁黄小立表示，物联网应用须具备感测、处理和连结等能力，而SoC要在兼顾小尺寸、低功耗和低成本的前提下整合上述功能，将面临许多挑战。
　　黄小立进一步解释，要达到上述设计目标，SoC开发商势必须使用先进制程，然而在先进制程设计中打造类比功能极为吃力，因此许多芯片大厂如联发科，已开始利用数位预失真（Digital Pre-distrotion）和数位校正（Digital Calibration）等方法，将许多类比功能转换为数位设计，降低在先进制程节点实作类比电路的挑战。
　　不仅如此，先进制程的设计规则愈来愈多，且类比与数位电路须同步验证，才能确保芯片功能运作无虞，因而对混合讯号验证的需求愈来愈高，也因此益华不断投入新技术研发，如近期所提出的「RealNumber Modeling」技术，即可让设计人员在数位模拟环境中执行类比电路模拟，从而大幅提高SoC的验证效率。
　　另一方面，益华也戮力厚实物联网芯片设计所需求的矽智财（IP）阵容，如数位讯号处理器（DSP）、中高阶类比数位转换器（ADC）与数位类比转换器（DAC），以及高速介面等，同时致力确保客户在益华设计工具中使用该公司IP时，可达到最佳的整合设计。
　　黄小立指出，亚太地区的芯片商长久以来较重视设计实作（Design Implement）层面，对于验证的投入相对较少。然而，随着SoC设计益趋复杂，芯片商已逐渐体认到验证的重要性，毕竟一旦发生错误而须返工，花费的时间与成本负担愈来愈大，因此这一两年购买电子设计自动化（EDA）验证工具的厂商家数已有明显增加。
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