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hp nx6320笔记本电脑电路图
54321OT1 BLOCK DIAGRAMCPU CORED14.318MHzP37Intel ULV Peutium-M / ULV Celeron-MULV Yonah / ULV Celeron479 Pins (Micro-FCBGA)CPU Thermal SensorMAX6657Clock GeneratorICS CK410-MP4DP5+1.05V/+1.5V_A DC/DC 3V & 5VP36XDPP5,6 CONN60_ITP-XDP P5P341.8V/SMDDR_VTERM/SMDR_VREF P35 BATT CHARGER MAX DISCHARGE/+2.5VP32 P33HyperThansport I/O BUS 400MHZ LCD Panel CRT port LVDSP18Cable DockingDDR2-SODIMM1P13Calistoga-GMR.G,B 1466 uFCBGAP7,8,9,10,11,12Singal Channel DDR2P26C1 TO 4 USB HUB LINE IN LINE OUT RJ45 CRT PORT SVIDEO OUT POWER JACKP31C32.768KHzDMIx2 PCI BUS24.576MHz 48MHz 25MHzHDD (1.8 inch)P27 DVD-ROMP27PATAICH7-M652 BGA USB PORT 0 USB 2.0P28 P14,15,16,17PCI-EMINI CARDSOCKET P19PCMCIA Controller TI 7612P20,21LAN Broadcom BCM5788P22USB PORT 1(POWER P28 USB)BSPISYSTEM BIOS SPIP31PCMCIA Slot / Smart Card P21RJ45P22BBluetooth Module P28 FingerPrintAzaliaP283.3V LPC, 33MHz32.768KHz 32.768KHzAudio CODEC AD1981HD P23,24AMPTPA6211A P24AUDIO JACKP24MODEM MDC 1.5 P29RJ11 JACKP29TPM (1.2)P28ASMSC1021100 Pins TQFPP25SYSTEM BIOS P30 FWHAFANP295 4Track PointP293KeyboardP292PROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberSystem Block DiagramFriday, July 29, 2005 Sheet1Rev 1A of 38154321INDEXPg#1 2DPower & GroundDescription Schematic Block Diagram System Information System Power Block Diagram CLOCL GENERATOR Intel ULV Peutium-M / ULV Celeron-M Calistoga-GM DDR II SO-DIMM ICH7-M LCD CONNECTOR / LCD PWR MINI CARD CARDBUS CONTROLLER GIGA-LAN+3V 3VSUS 3V_S5 3VPCU +5V 5VSUS 5V_S5 5VPCU +1.5V 1.5V_S5 1.8VSUS +2.5V SMDDR_VTERM SMDDR_VREF VDDA S0 S0, S3 S0, S3, S4, S5 S0, S3, S4, S5 S0 S0, S3 S0, S3, S4, S5 S0, S3, S4, S5 S0 S0, S3, S4, S5 S0, S3 S0 S0 S0, S3 S0 DDR COMMAND & CONTROL PULL UP POWER DDR REF POWER AUDIO ANALOG POWER (5V) DDR CORE POWER ALWAYS POWER (5V) MAIND S5_ON SUSON MAINON MAINON SUSON MAINONBNOTELabelVIN MBAT VCCRTC +15V CPU_CORE +1.05VACTIVES0, S3, S4, S5 S0, S3, S4, S5 S0, S3, S4, S5 S0, S3, S4, S5 S0 S0DescriptionAC ADAPTER (19V) MAIN BATTERY + (10~17V) RTC & KBC POWER +15V CPU CORE POWER (1.25/1.15V) FSB POWER (1.05V) (3_3V)Control SignalD3 4 5-6 7-12 13 14-17 18 19 20-21CVRON VRONMAIND SUSON S5_ON ALWAYS POWER (3V) MAINDC22 23-24 25 26 27 28 29 30 31 32AUDIO CODEC / AUDIO JACKKBCSUSON S5_ONCRT PORT HDD / CD-ROMUSB,BLUE TOOTH,FINGER PRINT, MDC,TPMFAN,KB,LEDs,TRACK POINT POWER SEQUENCE,BIOS CABLE DOCKINGDISCHARGE,+2.5V CHARGE(MAX) SYSTEM POWER(3V/5V) SYSTEM POWER(1.8V/0.9V) SYSTEM POWER(1.05V/1.5V)CPU POWERB33 34 35 36 37 38GND AGND T-GND 6260AGNDALL PAGESDIGITAL GROUND AUDIO GND AUDIO JACK GND CPU ANALOG GROUNDCHANGE HISTORYPCI DEVICES IRQ ROUTINGDEVICEGBIT ETHERNETAPCB STACK UPLAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : IN3 LAYER 7 : GND LAYER 8 : BOT4SM BUSDEVICE CLOCK GENERATOR DDR II LCD EDID CHARGER CPU THERMAL SENSOR3IDSEL # REQ/GNT # PCI_INTAD16 AD25 0 1 B C,D,EADDRESS D2H A0H TBD 16H 98HBUS (ICH6) PCLK_SMB, PCLK_SMB (ICH6)PCLK_SMB, PCLK_SMB GMCH (KBC) MBDATA,MBCLK (KBC) MBDATA,MBCLK2 ACardBusPROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberSystem InformationFriday, July 29, 2005 Sheet1Rev 1A 2 of 38554321S5_ONSYSTEM POWER BLOCK DIAGRAMMAINONDS.W MOS-FET 3V_S5DS.W Adaptor MOS-FET 3VPCU ALWAYS MAX1999 5VPCU ALWAYSSUSD S5_ON SUSD MAIND MAINDSC4215+2.5VS.W MOS-FET+3V 3VSUSVINS.W MOS-FET+5VCCVIN5VSUS+15VS.W CHARGER MAXSUSONMOS-FET3V_S5MAINONMAX1992MAINONB1.8VSUSTPS51100SMDDR_VTERM SMDDR_VREFB1.05VVINMAXV_AS5_ONMAINDBATTERYS.W MOS-FETS.W MOS-FET +1.5VVRON KBC_PW_ONVINTC7SH08FU TC7SH08FU TC7SH08FUS5_ON SUSON MAINONDISCHARGE DISCHARGE DISCHARGES5_OND SUSDASLP_S5#ACPU_VID[0..5] HWPG DPRSLPVR STP_CPU#MAX1907CPU_CORESLP_S3#MAINDPROJECT : OT1 Quanta Computer Inc.Size C Date:5 4 3 2Document NumberSystem Power block diagramFriday, July 29, 20051Rev 1A of 38Sheet312345678L11 +3V CLKVDD ACB(5,9,10,11,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37) (5,6,7,9,10,11,14,17,31,36) C105+3V +1.05V CLK_VDDA XINPlace these termination to close CK410M.DB2 stage:change RP7,RP11,RP22,RP14,RP12 to 22 ohm 7/15/200537U21120 ohms@100MhzY6 14.318MHZ38C135 10UC148 0.1UC150 0.1UC157 0.1UC138 0.1U215PCL=20pF50 49 10 55 54 XTAL_IN XTAL_OUT VTT_PWRGD#/PD PCI_STOP# CPU_STOP#XOUTVDDAVSSA1C106 R139AREF CPU0 CPU0# CPU1 CPU1#52 44 43 41 40 36 35 33 32 31 30 26 27 24 25 22 23 19 20 17 18 9 5 4 3 56 814M_REF2.2R CLK_VDDA C149 10U C446 0.1U C144 .01UDB2 stage:change C105,C106 to 15P 7/12/200515P (37) VR_PWRGD_CK410# (16) PM_STPPCI# (16) PM_STPCPU# R131 R132 R129 R135 R345 R119 *10K 12.1/F 12.1/F 0 4.7K 33R SMBCK SMBDT CG_BSEL0 CG_BSEL1 R_CG_BSEL2 CLK_VDDREF CLKVDD CLKVDD1reserve for LP218L7 +3V CLKVDD1 ACB (21) CLK48M C119 0.1U C108 0.1U C104 10U (16) CLKUSB_48 +3V CLK48M CLKUSB_48 CG_BSEL2 (25) 14M_KBCCPU2_ITP/SRC7 CPU2#_ITP/SRC7# 46 47 12 16 53 48 42 1 7 21 28 34 11 39 SCLK SDATA FSA/USB_48 FSB/TEST_MODE/GND FSC/TEST_SEL VDD_REF VDD_CPU VDD_PCI_1 VDD_PCI_2 VDD_SRC0 VDD_SRC1 VDD_SRC2 VDD_48 IREF SRC0 SRC0# PCIF1/CLKREQA# PCI5 PCI4 PCI3 PCI2 PCIF0/ITP_EN SRC6/CLKREQA# SRC6#/CLKREQB#R126 RP7 1 3 RP11 RHCLK_MCH 1 RHCLK_MCH# 3 RP17 RHCLK_XDP 1 RHCLK_XDP# 3 RHCLK_CPU RHCLK_CPU# 218REQA# RSRC5 RSRC5# RSRC4 RSRC4# RSRC3 RSRC3# R361 R365 RP21 1 3 RP22 3 133R 22X2 2 4 22X2 2 4 *33X2 2 4 0 10K *33X2 2 4 22X2 4 2 0 0 33X2 4 2 22X2 4 2 22X2 4 2 10K 12.1/F 12.1/F 33R 33R 33R 12.1/F 12.1/F +3V +3V +3V LP21814M_ICH (16) CLK_CPU_BCLK (5) CLK_CPU_BCLK# (5) CLK_MCH_BCLK (7) CLK_MCH_BCLK# (7) CLK_XDP (5) CLK_XDP# (5)ANCCLKREQB# (19) CLK_PCIE_XDP (5) CLK_PCIE_XDP# (5) CLK_PCIE_MINI (19) CLK_PCIE_MINI# (19)120 ohms@100MhzCK-410MSRC5 SRC5# SRC4/SATA SRC4#/SATA# SRC3/GND SRC3#/GND SRC2 SRC2# SRC1 SRC1#R1302.2R CLK_VDD48CLKVDD C131 0.1U C139 4.7U/10VDB 2 stage:mount 7/15/2005R357CLK_VDD48 R357 4.75K/F IREFR127B1R CLK_VDDREFIref=2.32mA, Ioh=4*IrefC133 0.1U (9) DREFCLK (9) DREFCLK#R141 R142 RP18 RSRC_ICH 3 RSRC_ICH# 1 RP14 RSRC_MCH 3 RSRC_MCH# 1 RP12 RDREFSSCLK 3 RDREFSSCLK# 1 208REQA# R_PCLK_PCI R_PCLK_KBC R_PCLK_6611 R_PCLK_LAN R_PCLK_ICH R128 R120 R115 R112 R116 R125 R117 R118LP218 NCCLK_PCIE_ICH (15) CLK_PCIE_ICH# (15) CLK_PCIE_3GPLL (9) CLK_PCIE_3GPLL# (9) DREFSSCLK (9) DREFSSCLK# (9)BDREFCLK DREFCLK#1 322X22 4R_DOT96 R_DOT96#14 15DOT96 DOT96#DB2 stage:change RP8 to 22 ohm7/12/2005GND_48 GND_REF GND_PCI_1 GND_PCI_2 GND_SRC GND_CPURP8PCLK_FWH PCLK_KBC PCLK_6611 PCLK_LAN PCLK_ICH(30) (25) (20) (22) (15)+3V13 51 2 6 29 45ICS9LP208AGLFT U20ICS9LP208/ICS954218250mA ( MAX. ) SMbus address D4PCLK_DBP (19) PCLK_TPM (28)FSC FSB FSA 1 0 0 0 0 1 1 1CCPU 100 133 166 200 266 333 400SRC 100 100 100 100 100 100 100PCI 33 33 33 33 33 33 33(16) PDAT_SMB0 0 1 1 0 0 1 11 1 1 0 0 0 0 1DOTHAN FSB 400 DOTHAN FSB 533(37) VR_PWRGD_CK410#1 VR_PWRGD_CK410# 2 35 4VR_PWRGD_CK410 VR_PWRGD_CK410 (16)SN74LVC1G04DCKR +3VR_PCLK_ICHR12410KR122 *10KSRC0 TO 100M14M_REFR123 10K Q13 2N7002E R114 10K R113 10K SMBDT SMBDT (13,19,26)SRC0 TO 96M2RESERVED3+3V1EMI 48MHZCLKUSB_48 C128 *10PICS9LP208 should be removedRP6 CLK_CPU_BCLK CLK_CPU_BCLK#C* Frequence select by CPU auto sense.To ICH6-MQ12 2N7002ETo DDR-SODIMM2 1SMBCKICS9LP208DEFOULT SETTINGICS954218(16) PCLK_SMBCLK48MC137 *10P3SMBCK (13,19,26)pin NO. 12 16 53 39 9 33Dpin NO. CPU Freq. FIXED SELECT VREF NC. CLKREQA#* GND GND 12 16 53 39 9 33 24 25 52REF0/*SELSRC_LCDCLK#33MHZPCLK_KBC C112 *10P C109 *10P C129 *10PCPU Freq. SELECT+1.05V PCLK_ R349 1K 0 CG_BSEL2 R347 R346 (5) XDP_OBS0 XDP_OBS0 R348 1K *0 0 XDP_BPM#3 (5) PCLK_LAN PCLK_TPM PCLK_FWH C114 *10P C120 *10P C123 *10P MCH_BSEL2 (9) PCLK_ICHSELECT IREF PULL LO *SELSRC_LCDCLK#/PCICLK_F1 CLKREQA#* SRCCLKT3 SRCCLKC3(5) CPU_BSEL21 3 RP10 1 3 RP16 CLK_XDP 1 CLK_XDP# 3 RP15 CLK_PCIE_3GPLL 3 CLK_PCIE_3GPLL# 1 RP19 CLK_PCIE_ICH 3 CLK_PCIE_ICH# 1 RP13 DREFSSCLK 3 DREFSSCLK# 1 RP23 CLK_PCIE_MINI 3 CLK_PCIE_MINI# 1 RP20 CLK_PCIE_XDP 1 CLK_PCIE_XDP# 3 RP9 DREFCLK 3 DREFCLK# 1CLK_MCH_BCLK CLK_MCH_BCLK#*49.9/FX2 2 4 *49.9/FX2 2 4 *49.9/FX2 2 4 *49.9/FX2 4 2 *49.9/FX2 4 2 *49.9/FX2 4 2 *49.9/FX2 4 2 *49.9/FX2 2 4 *49.9/FX2 4 2D24 25 5214.318MHZ14M_ICH C127 *10P14M_KBCC118 *10P Size Custom Date: Document NumberREF0PROJECT : OT1 Quanta Computer Inc.CLOCK GENERATORFriday, July 29, 20057Rev 1A of8Sheet43812345654321(7) H_D#[63:0] (7) H_A#[31:3] U36A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_ADSTB#1 H_A20M# H_FERR# H_IGNNE# 0/F H_STPCLK_R# H_INTR H_NMI H_SMI# TP_A32# TP_A33# TP_A34# TP_A35# TP_A36# TP_A37# TP_A38# TP_A39# TP_APM0# TP_APM1# TP_HFPLL T104H_D#[63:0] U36B H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1 H_GTLREF(7)D(7) H_ADSTB#0 (7) H_REQ#[4:0]J4 L4 M3 K5 M1 N2 J1 N3 P5 P2 L1 P4 P1 R1 L2 K3 H2 K2 J3 L5 Y2 U5 R3 W6 U4 Y5 U2 R4 T5 T3 W3 W5 Y4 W2 Y1 V4 A6 A5 C4 D5 C6 B4 A3 AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3 B25A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# ADSTB[1]# A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI# RSVD[01]# RSVD[02]# RSVD[03]# RSVD[04]# RSVD[05]# RSVD[06]# RSVD[07]# RSVD[08]# RSVD[09]# RSVD[10]# RSVD[11]#ADS# BNR# BPRI# DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS[0]# RS[1]# RS[2]# TRDY# HIT# HITM# BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# PROCHOT THERMDA THERMDC THERMTRIP#H1 E2 G5 H5 F21 E1 F1 D20 B3 H4 B1 F3 F4 G3 G2 G6 E4 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 D21 A24 A25 C7H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_BREQ#0 H_IERR# H_INIT# H_LOCK# H_RS#0 H_RS#1 H_RS#2 H_TRDY# H_HIT# H_HITM# XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET# H_PROCHOT# H_THERMDA H_THERMDC PM_THRMTRIP#H_ADS# (7) H_BNR# (7) H_BPRI# (7)+1.05V +1.05V +1.05V (4,6,7,9,10,11,14,17,31,36)CONTROLH_DEFER# (7) H_DRDY# (7) H_DBSY# (7) H_BREQ#0 (7) H_INIT# (14) H_LOCK# (7) H_CPURST# (7)R414 56/FNear to MCH &500milsH_RS#[2:0] (7) H_TRDY# (7) H_HIT# (7) H_HITM# (7)(7) (7) (7) (7)H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_D#[63:0]E22 F24 E26 H22 F23 G25 E25 E23 K24 G24 J24 J23 H26 F26 K22 H25 H23 G22 J26 N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 M24 N25 M26 AD26 C26 D25 B22 B23 C21D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10 D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# GTLREF TEST1 TEST2 BSEL[0] BSEL[1] BSEL[2]D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# COMP[0] COMP[1] COMP[2] COMP[3]AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 W24 Y25 V23 AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 AD23 AE24 AC20 R26 U26 U1 V1 E5 B5 D24 D6 D7 AE6H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3 COMP0 COMP1 COMP2 COMP3 R198 R197 R152 R151DATA GRP 2DATA GRP 0ADDR GROUP 0 ADDR GROUP 0DH_DSTBN#2 (7) H_DSTBP#2 (7) H_DINV#2 (7) H_D#[63:0] (7)(7) H_A#[31:3]XDP/ITP SIGNALS+1.05V XDP_BPM#3 (4) R154 54.9/F +1.05V +1.05V R412 68 H_PROCHOT# (37) R199 1K/F (7) H_DSTBN#1 (7) H_DSTBP#1 (7) H_DINV#1DATA GRP 3DATA GRP 1Trcae width : ? placement &0.5&25/25mils H_DSTBN#3 (7) H_DSTBP#3 (7) H_DINV#3 (7) 27.4/F 54.9/F 27.4/F 54.9/F PAD T101 ICH_DPRSTP# (14) H_DPSLP# (14) H_CPUSLP# (7,14) PSI# (37)CC(7) H_ADSTB#1 (14) H_A20M# (14) H_FERR# (14) H_IGNNE# R149 (14) H_STPCLK# (14) H_INTR (14) H_NMI (14) H_SMI#THERM+1.05VPM_THRMTRIP# (9,14) R193MISCDB2 change:R196 install to 51 ohm H CLK*1K/F 51/F CPU_BSEL0 CPU_BSEL1 CPU_BSEL2BCLK[0] BCLK[1] RSVD[12]#A22 A21 T22 D2 F6 D3 C1 AF1 D22 C23 C24CLK_CPU_BCLK CLK_CPU_BCLK# TP_EXTBREF TP_SPARE0 TP_SPARE1 TP_SPARE2 TP_SPARE3 TP_SPARE4 TP_SPARE5 TP_SPARE6 TP_SPARE7CLK_CPU_BCLK (4) CLK_CPU_BCLK# (4) T57 T31 T42 T35 T103 T102 T54 T53 T55R194 2K/F20/15mils R196 R416 56/FT105 T39 T32 T33 T34 T44 T100 T106 T38 T40 T56+1.05VRESERVED(4) CPU_BSEL2 Layout note: 0.5& max for GTLREFDPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI#R150 *200/F H_DPWR# (7) H_PWRGD (14) H_PWRGD is CMOS driving by ICHH_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# PSI#RSVD[13]# RSVD[14]# RSVD[15]# RSVD[16]# RSVD[17]# RSVD[18]# RSVD[19]# RSVD[20]#PZ-01 R415 1K/FTO VRD+3V +3V +3VPZ-012+1.05VR420 10KR429 10K THDAT_SMBBB(25,33) MBDATA3+3V1Q32 2N7002E2XDP_BPM#5 XDP_BPM#4 (4) XDP_OBS0 XDP_BPM#2 +1.05V XDP_BPM#1 XDP_BPM#0 R227 R217 R219 R223 R222 *0 0 *56/F 0 0 XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3H_PWRGD +1.05VAR220 R2091K/F 54.9/FH_PWRGD_XDP CLK_PCIE_XDP CLK_PCIE_XDP# L_CLKCTLB L_CLKCTLA(4) CLK_PCIE_XDP (4) CLK_PCIE_XDP# (9) L_CLKCTLB (9) L_CLKCTLA R202 54.9/FXDP_TCK1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59GND0 GND1 OBSFN_A0 OBSFN_C0 OBSFN_A1 OBSFN_C1 GND2 GND3 OBSDATA_A0 OBSDATA_C0 OBSDATA_A1 OBSDATA_C1 GND4 GND5 OBSDATA_A2 OBSDATA_C2 OBSDATA_A3 OBSDATA_C3 GND6 GND7 OBSFN_B0 OBSFN_D0 OBSFN_B1 OBSFN_D1 GND8 GND9 OBSDATA_B0 OBSDATA_D0 OBSDATA_B1 OBSDATA_D1 GND10 GND11 OBSDATA_B2 OBSDATA_D2 OBSDATA_B3 OBSDATA_D3 GND12 GND13 PWRGD/HOOK0 ITPCLK/HOOK4 HOOK1 ITPCLK#/HOOK5 VCC_OBS_AB VCC_OBS_CD HOOK2 RESET#/HOOK6 HOOK3 DBR#/HOOK7 GND14 GND15 SDA TDO SCL TRSTn TCK1 TDI TCK0 TMS GND16 GND17*CONN60_ITP-XDP2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60XDP_DBRESET#2CN27XDP1R403 *3303SYS_RST# (16) +3V(25,33) MBCLK31Q33 2N7002ETHCLK_SMBQ28 *MMBTR418 100RH/W MONITORXDP_DBRESET# (16) C536 0.1U 6657VCC +1.05V CLK_XDP (4) CLK_XDP# (4) R205 XDP_DBRESET# R203 XDP_TDO XDP_TRST# XDP_TDI XDP_TMS R216 R218 R208 R210 1K/F 1K/F 54.9/F 54.9/F 54.9/F 54.9/F H_CPURST# +3V +1.05V C273 0.1U C275 0.1U (34) 1999_SHDN# H_THERMDA C534 2200P H_THERMDCU421 2 3 4 VCC DXP DXN -OVT SMCLK SMDATA -ALT GND 8 7 6 5THCLK_SMB THDAT_SMB THERM_ALERT# THERM_ALERT# (16)AH/W ShutdownDB2 stage:Delete U42 temporary*MAX6657/GMT-781ICH_THRM# To SB --& System throttlingPROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberCPU(1 OF 2 )Friday, July 29, 2005 Sheet1Rev 1A 5 of 38543254321VCC_CORE U36C A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 VCC[001] VCC[68] VCC[002] VCC[69] VCC[003] VCC[70] VCC[004] VCC[71] VCC[005] VCC[72] VCC[006] VCC[73] VCC[007] VCC[74] VCC[008] VCC[75] VCC[009] VCC[76] VCC[010] VCC[77] VCC[011] VCC[78] VCC[012] VCC[79] VCC[013] VCC[80] VCC[014] VCC[81] VCC[015] VCC[82] VCC[016] VCC[83] VCC[017] VCC[84] VCC[018] VCC[85] VCC[019] VCC[86] VCC[020] VCC[87] VCC[021] VCC[88] VCC[022] VCC[89] VCC[023] VCC[90] VCC[024] VCC[91] VCC[025] VCC[92] VCC[026] VCC[93] VCC[027] VCC[94] VCC[028] VCC[95] VCC[029] VCC[96] VCC[030] VCC[97] VCC[031] VCC[98] VCC[032] VCC[99] VCC[033] VCC[100] VCC[034] VCC[035] VCCP[01] VCC[036] VCCP[02] VCC[037] VCCP[03] VCC[038] VCCP[04] VCC[039] VCCP[05] VCC[040] VCCP[06] VCC[041] VCCP[07] VCC[042] VCCP[08] VCC[043] VCCP[09] VCC[044] VCCP[10] VCC[045] VCCP[11] VCC[046] VCCP[12] VCC[047] VCCP[13] VCC[048] VCCP[14] VCC[049] VCCP[15] VCC[050] VCCP[16] VCC[051] VCC[052] VCCA VCC[053] VCC[054] VCC[055] VID[0] VCC[056] VID[1] VCC[057] VID[2] VCC[058] VID[3] VCC[059] VID[4] VCC[060] VID[5] VCC[061] VID[6] VCC[062] VCC[063] VCC[064] VCC[065] VCCSENSE VCC[066] VCC[067] VSSSENSE PZ-01 AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 AD6 AF5 AE5 AF4 AE3 AF2 AE2VCC_CORE +1.05V VCC_CORE +1.5V +1.05V (4,5,7,9,10,11,14,17,31,36) VCC_CORE (32,37) +1.5V (11,15,17,19,31,36)U36D A4 A8 A11 A14 A16 A19 A23 A26 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24DDVCC_COREC236 22UC237 22UC238 22UC239 22UC240 22UC241 22UC219 22UC220 22UCC221 22UC222 22UC223 22UC224 22UC+1.05Vchange footprint 7/27/2005+ C255 220U +1.5VC199 22UC225 22UC203 22UC204 22UC205 22UC206 22UC192 22UC252 22UC269 0.01U +1.5VC270 10U/X6SC230 22UC212 22UC211 22UC250 22UBC251 22UC254 22UC229 22UC233 22UBC234 22UC235 22UC217 22UC218 22UH_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6(37) (37) (37) (37) (37) (37) (37)VCC_CORER170 100/F VCCSENSE (37) VSSSENSE (37) Connect to PWM , special layout R171 100/FAF7 AE7VCCSENSE VSSSENSEVCC_CORE+1.05VAAC198 22UC200 22UC201 22UC202 22UC185 0.1UC186 0.1UC194 0.1UC193 0.1UC260 0.1UC257 0.1UPZ-01PROJECT : OT1 Quanta Computer Inc.Size B Date:5 4 3 2Document NumberCPU(2 OF 2 )Friday, July 29, 2005 Sheet1Rev 1A 6 of 3854321H_XRCOMP R411 24.9/F(5) H_D#[63:0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING (4) CLK_MCH_BCLK (4) CLK_MCH_BCLK# F1 J1 H1 J6 H3 K2 G1 G2 K9 K1 K7 J8 H4 J3 K11 G4 T10 W11 T3 U7 U9 U11 T11 W9 T1 T8 T4 W7 U5 T9 W6 T5 AB7 AA9 W4 W3 Y3 Y7 W5 Y10 AB8 W2 AA4 AA7 AA2 AA6 AA10 Y8 AA1 AB4 AC9 AB11 AC11 AB3 AC2 AD1 AD9 AC1 AD7 AC6 AB5 AD10 AD4 AC8 E1 E2 E4 Y1 U1 W1U35A H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING H_CLKIN H_CLKIN# H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_VREF_0 H_BNR# H_BPRI# H_BREQ#0 H_CPURST# H_DBSY# H_DEFER# H_DPWR# H_DRDY# H_VREF_1 H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_HIT# H_HITM# H_LOCK# H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14 E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13 J7 W8 U3 AB10 K4 T7 Y5 AC4 K3 T6 AA5 AC5 D3 D4 B3 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BREQ#0 R397 H_DEFER# H_DPWR# H_DRDY# H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_HIT# H_HITM# H_LOCK#H_A#[31:3] (5) +1.05V +1.05V (4,5,6,9,10,11,14,17,31,36)15 mils/10milsDD+1.05VR188 54.9/F H_XSCOMP+1.05VR409 221/F H_XSWING+1.05V& 0.1& H_VREF :10 mils/20 mils spaceCR410 100/FC527 0.1UH_ADS# (5) H_ADSTB#0 (5) H_ADSTB#1 (5) H_BNR# (5) H_BPRI# (5) H_BREQ#0 (5) H_CPURST# (5) H_DBSY# (5) H_DEFER# (5) H_DPWR# (5) H_DRDY# (5) H_DINV#[3:0] (5) C232 0.1U H_DSTBN#[3:0] (5)R183 100/F H_VREF C216 0.1U R176 200/FCHOST0+1.05VH_VREFR189 54.9/F H_YSCOMP+1.05VH_DSTBP#[3:0] (5)BBR190 221/F H_YSWINGR191 100/FC265 0.1UH_HIT# (5) H_HITM# (5) H_LOCK# (5) H_REQ#[4:0] (5)H_YRCOMP R192 24.9/FH_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2 H_SLPCPU# H_TRDY#D8 G8 B8 F8 A8 B4 E6 D6 E3 E7H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2 H_CPUSLP# H_TRDY#H_RS#[2:0] (5)CLK_MCH_BCLK AG2 CLK_MCH_BCLK# AG115 mils/10milsAShort Stub & 100mils extract from same pointH_CPUSLP# (5,14) H_TRDY# (5)ACalistogaPROJECT : OT1 Quanta Computer Inc.Size B Date:5 4 3 2Document NumberGMCH HOST(1 OF 6 )Friday, July 29, 2005 Sheet1Rev 1A 7 of 3854321(13) M_A_DQ[63:0]DU35D M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 AJ35 AJ34 AM31 AM33 AJ36 AK35 AJ32 AH31 AN35 AP33 AR31 AP31 AN38 AM36 AM34 AN33 AK26 AL27 AM26 AN24 AK28 AL28 AM24 AP26 AP23 AL22 AP21 AN20 AL23 AP24 AP20 AT21 AR12 AR14 AP13 AP12 AT13 AT12 AL14 AL12 AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2 AW2 AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 Calistoga SA_BS_0 SA_BS_1 SA_BS_2 SA_CAS# SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 AU12 AV14 BA20 AY13 AJ33 AM35 AL26 AN22 AM14 AL9 AR3 AH4 AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5 AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12 AW14 AK23 AK24 AY14 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CAS# M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_RAS# TP_MA_RCVENIN# TP_MA_RCVENOUT# M_A_WE# M_A_BS#0 (13) M_A_BS#1 (13) M_A_BS#2 (13) M_A_CAS# (13) M_A_DM[7:0] (13) AK39 AJ37 AP39 AR41 AJ38 AK38 AN41 AP41 AT40 AV41 AU38 AV38 AP38 AR40 AW38 AY38 BA38 AV36 AR36 AP36 BA36 AU36 AP35 AP34 AY33 BA33 AT31 AU29 AU31 AW31 AV29 AW29 AM19 AL19 AP14 AN14 AN17 AM16 AP15 AL15 AJ11 AH10 AJ9 AN10 AK13 AH11 AK10 AJ8 BA10 AW10 BA4 AW4 AY10 AY9 AW5 AY5 AV4 AR5 AK4 AK3 AT4 AK5 AJ5 AJ3U35E SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 Calistoga SB_BS_0 SB_BS_1 SB_BS_2 SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 AT24 AV23 AY28 AR24 AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4 AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5 AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23 AU23 AK16 AK18 AR27DM_A_DQS[7:0] (13)ACSA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#B MEMORYM_A_DQS#[7:0] (13)M_A_A[13:0] (13)SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#MEMORYCSYSTEMDDRBM_A_RAS# (13) T37 T36 M_A_WE# (13)DDRSYSTEMBAAPROJECT : OT1 Quanta Computer Inc.Size B Date:5 4 3 2Document NumberGMCH DDR(2 OF 6)Friday, July 29, 2005 Sheet1Rev 1A 8 of 385432120mils/20mils spaceT22 T27 T23 T109 T110 T51 T50 T52 T41 T26 T25 T90 T98 T99 T28 T30 CLK_MCH_OE# MCH_RSVD_1 MCH_RSVD_2 MCH_RSVD_3 MCH_RSVD_4 MCH_RSVD_5 MCH_RSVD_6 MCH_RSVD_7 MCH_RSVD_8 TV_DCONSEL0 TV_DCONSEL1 MCH_RSVD_11 MCH_RSVD_12 MCH_RSVD_13 MCH_RSVD_14 MCH_RSVD_15 MCH_BSEL0 MCH_BSEL1 MCH_BSEL2 MCH_CFG_3 MCH_CFG_4 MCH_CFG_5 MCH_CFG_6 MCH_CFG_7 MCH_CFG_8 MCH_CFG_9 MCH_CFG_10 MCH_CFG_11 MCH_CFG_12 MCH_CFG_13 MCH_CFG_14 MCH_CFG_15 MCH_CFG_16 MCH_CFG_17 MCH_CFG_18 MCH_CFG_19 MCH_CFG_20 PM_BMBUSY# PM_EXTTS#0 PM_EXTTS#1 U35B H32 RSVD_0 T32 RSVD_1 R32 RSVD_2 F3 RSVD_3 F7 RSVD_4 AG11 RSVD_5 AF11 RSVD_6 H7 RSVD_7 J19 RSVD_8 K30 RSVD_9 J29 RSVD_10 A41 RSVD_11 A35 RSVD_12 A34 RSVD_13 D28 RSVD_14 D27 RSVD_15 K16 K18 J18 F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15 J25 K27 J26 G28 F25 H26 G6 AH33 AH34 H28 H27 K28 D1 C41 C1 BA41 BA40 BA39 BA3 BA2 BA1 B41 B2 AY41 AY1 AW41 AW1 A40 A4 A39 A3 CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20 PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1 PM_THRMTRIP# PWROK RSTIN# SDVO_CTRLCLK SDVO_CTRLDATA LT_RESET# NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 Calistoga SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3 SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3 SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3 SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3 SM_OCDCOMP_0 SM_OCDCOMP_1 SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3 SM_RCOMP# SM_RCOMP SM_VREF_0 SM_VREF_1 G_CLKIN# G_CLKIN D_REFCLKIN# D_REFCLKIN D_REFSSCLKIN# D_REFSSCLKIN DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 AY35 AR1 AW7 AW40 AW35 AT1 AY7 AY40 AU20 AT20 BA29 AY29 AW13 AW12 AY21 AW21 AL20 AF10 BA13 BA12 AY20 AU21 AV9 AT9 AK1 AK41 AF33 AG33 A27 A26 C40 D41 AE35 AF39 AG35 AH39 AC35 AE39 AF35 AG39 M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR0 (13) M_CLK_DDR1 (13) U35C (18) (18) (5) (5) (18) (18) DPST_PWM LCD_BLON L_CLKCTLA L_CLKCTLB EDIDCLK EDIDDATA T24 M_CKE0 M_CKE1 (18) DISP_ON M_CKE0 (13) M_CKE1 (13) R366 1.5K (18) TXLCLKOUT(18) TXLCLKOUT+ M_CS#0 (13) M_CS#1 (13) DPST_PWM LCD_BLON L_CLKCTLA L_CLKCTLB EDIDCLK EDIDDATA L_IBG L_VBG DISP_ON L_VREFH L_VREFL TXLCLKOUTTXLCLKOUT+ D32 J30 H30 H29 G26 G25 B38 C35 F32 C33 C32 A33 A32 E27 E26 C37 B35 A37 L_BKLTCTL L_BKLTEN L_CLKCTLA L_CLKCTLB L_DDC_CLK L_DDC_DATA L_IBG L_VBG L_VDDEN L_VREFH L_VREFL LA_CLK# LA_CLK LB_CLK# LB_CLK EXP_A_COMPI EXP_A_COMPO EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8 EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15 EXP_A_RXP_0 EXP_A_RXP_1 EXP_A_RXP_2 EXP_A_RXP_3 EXP_A_RXP_4 EXP_A_RXP_5 EXP_A_RXP_6 EXP_A_RXP_7 EXP_A_RXP_8 EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15 EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4 EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8 EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12 EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15 EXP_A_TXP_0 EXP_A_TXP_1 EXP_A_TXP_2 EXP_A_TXP_3 EXP_A_TXP_4 EXP_A_TXP_5 EXP_A_TXP_6 EXP_A_TXP_7 EXP_A_TXP_8 EXP_A_TXP_9 EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15 D40 EXP_A_COMPX D38 F34 G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38 D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38 F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40 D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40 R143 24.9/F+V1.5_PCIERSVDM_CLK_DDR#0 M_CLK_DDR#1M_CLK_DDR#0 (13) M_CLK_DDR#1 (13)D+1.05VDR175 10KM_CS#0 M_CS#1MUXINGLVDS(4) MCH_BSEL2 T46 T47 R172 10K T4315mils/15milsM_OCDCOMP_0 M_OCDCOMP_1 M_ODT0 M_ODT1 M_ODT0 (13) M_ODT1 (13)(18) TXLOUT0(18) TXLOUT1(18) TXLOUT2-TXLOUT0TXLOUT1TXLOUT2-LA_DATA#_0 LA_DATA#_1 LA_DATA#_2R178 *40.2/FR168 *40.2/F(18) TXLOUT0+ (18) TXLOUT1+ (18) TXLOUT2+TXLOUT0+ TXLOUT1+ TXLOUT2+B37 B34 A36 G30 D30 F29DDRLA_DATA_0 LA_DATA_1 LA_DATA_2 LB_DATA#_0 LB_DATA#_1 LB_DATA#_2M_RCOMP# M_RCOMP SMDDR_VREF Layout as short as passable NC from WW45 LCD_BLON(10) MCH_CFG_13 T45 T49 T48CCLK(16) PM_BMBUSY# (13) PM_EXTTS#0DREFCLK# DREFCLK DREFSSCLK# DREFSSCLK DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3PCI-EXPRESSCLK_PCIE_3GPLL# (4) CLK_PCIE_3GPLL (4) DREFCLK# (4) DREFCLK (4) DREFSSCLK# (4) DREFSSCLK (4) DMI_TXN[3:0] (15)R147 100K Shall be 10K divider of 1.8V_SUSF30 D29 F28LB_DATA_0 LB_DATA_1 LB_DATA_2GRAPHICSCFG PMC(5,14) PM_THRMTRIP# (16,37) DELAY_VR_PWRGOOD (15) PLT_RST-R# R144 T29 +3V (15) MCH_ICH_SYNC T118 T92 T117 T89 T96 T97 T112 T120 T116 T91 T114 T88 T119 T93 T115 T94 T111 T95 T113 TP_MCH_NC0 TP_MCH_NC1 TP_MCH_NC2 TP_MCH_NC3 TP_MCH_NC4 TP_MCH_NC5 TP_MCH_NC6 TP_MCH_NC7 TP_MCH_NC8 TP_MCH_NC9 TP_MCH_NC10 TP_MCH_NC11 TP_MCH_NC12 TP_MCH_NC13 TP_MCH_NC14 TP_MCH_NC15 TP_MCH_NC16 TP_MCH_NC17 TP_MCH_NC18 RST IN# MCH 100/F R153 *10K/F(31) TV_COMP (31) TV_Y/G (31) TV_C/R R377 R379 R381 150/F 150/F 150/F R167TV_COMP TV_Y/G TV_C/R 4.99K/FA16 C18 A19 TVIREF J20 B16 B18 B19TV_DACA_OUT TV_DACB_OUT TV_DACC_OUT TV_IREF TV_IRTNA TV_IRTNB TV_IRTNCTVDMIMISCDMI_TXP[3:0] (15) DMI_RXN[3:0] (15) (26) CRT_B (26) CRT_G (26) CRT_R& 0.1& . 15mils/15mils spaceCRT_B CRT_G CRT_R R159 R162 R165 75/F 75/F 75/F DDCCLK DDCDATA R160 R164 (26) CRT_VSYNC R158 39/F 255/F 39/F HSYNC CRTIREF VSYNC Calistoga E23 D23 C22 B22 A21 B21 C26 C25 G23 J22 H23 CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED# CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_IREF CRT_VSYNCAE37 DMI_RXN0 AF41 DMI_RXN1 AG37 DMI_RXN2 AH41 DMI_RXN3 AC37 DMI_RXP0 AE41 DMI_RXP1 AF37 DMI_RXP2 AG41 DMI_RXP3NCVGA(26) DDCCLK (26) DDCDATA (26) CRT_HSYNC DMI_RXP[3:0] (15)BB+3V 1.8VSUS +3V L_CLKCTLA L_CLKCTLB R155 R182 80.6/F M_RCOMP# R157 10K/F *10K/F PM_EXTTS#0 PM_EXTTS#1 R353 0 PM_DPRSLPVR (16,37) DB2 CHANGE M_RCOMP MCH_CFG_6 MCH_CFG_7 MCH_CFG_9 R179 R166 R187 *10K/F *10K/F *10K/F +3V R145 R148 10K/F 10K/F15mils/10milsR177 80.6/FAA(10) MCH_CFG_[12:5] (10) MCH_CFG_[20:16]MCH_CFG_[12:5] MCH_CFG_[20:16]+V1.5_PCIE SMDDR_VREF 1.8VSUS +3V+V1.5_PCIE (11) SMDDR_VREF (13,35) 1.8VSUS (10,13,30,31,35) +3V (4,5,10,11,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37)PROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberGMCH DMI VEDIO(3 OF 6)Friday, July 29, 2005 Sheet1Rev 1A of 389543254321U35G +1.05V + C268 330U/2.5V/ESR-9/POSC267 +1.05VU35FDCBAAA33 W33 P33 N33 L33 J33 AA32 Y32 W32 V32 P32 N32 M32 L32 J32 AA31 W31 V31 T31 R31 P31 N31 M31 AA30 Y30 W30 V30 U30 T30 R30 P30 N30 M30 L30 AA29 Y29 W29 V29 U29 R29 P29 M29 L29 AB28 AA28 Y28 V28 U28 T28 R28 P28 N28 M28 L28 P27 N27 M27 L27 P26 N26 L26 N25 M25 L25 P24 N24 M24 AB23 AA23 Y23 P23 N23 M23 L23 AC22 AB22 Y22 W22 P22 N22 M22 L22 AC21 AA21 W21 N21 M21 L21 AC20 AB20 Y20 W20 P20 N20 M20 L20 AB19 AA19 Y19 N19 M19 L19 N18 M18 L18 P17 N17 M17 N16 M16 L16VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110Calistoga25milsVCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99 VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107 AU41 AT41 VCC_SM1 AM41 VCC_SM2 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 VCC_SM106 AJ1 VCC_SM107C444 C154 0.47U 0.47U+C172 C173 C166 10U/X6S 10U/X6S 1UC159 0.1UC167 0.1UC244 0.1U1.8VSUS120mils+ C264 330U C195 C168 10U/X6S 10U/X6S C176 0.47U C153 0.1U C245 0.1U C158 0.1UC189 0.47UC208 0.47Uplace Cap on BA23 Ballplace Cap on AJ23 Ball(11) +1.5V_AUX (4,5,6,7,9,11,14,17,31,36) (9,13,30,31,35) +1.05V 1.8VSUS+1.5V_AUX +1.05V 1.8VSUSVCCAD27 AC27 AB27 AA27 Y27 W27 V27 U27 T27 R27 AD26 AC26 AB26 AA26 Y26 W26 V26 U26 T26 R26 AD25 AC25 AB25 AA25 Y25 W25 V25 U25 T25 R25 AD24 AC24 AB24 AA24 Y24 W24 V24 U24 T24 R24 AD23 V23 U23 T23 R23 AD22 V22 U22 T22 R22 AD21 V21 U21 T21 R21 AD20 V20 U20 T20 R20 AD19 V19 U19 T19 AD18 AC18 AB18 AA18 Y18 W18 V18 U18 T18VCC_NCTF0 VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72330U/2.5V/ESR-9/POSVSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8 VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17D+1.5V_AUXNCTFVCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8 VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15100milsCBC171 0.47Uplace Cap on BA15 BallCalistoga1.MCH_CFG_5 Low = DMI X2, High=DMIX4 2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)GMCH Strap pin(9) MCH_CFG_5 (9) MCH_CFG_6 (9) MCH_CFG_7 (9) MCH_CFG_9 (9) MCH_CFG_10 (9) MCH_CFG_11 (9) MCH_CFG_12 (9) MCH_CFG_13 (9) MCH_CFG_16 R184 R185 R163 R186 R181 R180 R173 R174 R169 *2.2K *2.2K *2.2K *2.2K *2.2K3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU 4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility 5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility 6.MCH_CFG_11: Low=Calistoga, High=Reserved 7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled, High=Dynamic ODT Enabled. 8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V*2.2K *2.2KDB2 change:not stuff 7/299.MCH_CFG_19 DMI LANE Reversal:Low=Normal,High=LANES Reversed.intel WW51 recommand*2.2K *2.2K10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only SDVO or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1 are operation simultaneously via the PEG port.A25milsC529 C528 0.47U 0.47U(9) MCH_CFG_18 (9) MCH_CFG_19 (9) MCH_CFG_20R161 R146 R156*1K/F *1K/F *1K/F+3V +3V +3V Size Custom Date: Document NumberPROJECT : OT1 Quanta Computer Inc.GMCH PW & STRAP(4 OF 6)Friday, July 29, 2005 Sheet1Rev 1A 3825mils5 4 3 210of54321+1.5V L14+V1.5_DPLLA 10uH/0805+V3.3_TVDAC L46 FCM C48980mils+V3.3_ATVBG+2.5V +V3.3_ATVBG C152 0.1U C162 10U/X6S U35H H22 C30 B30 A30 AJ41 AB41 Y41 V41 R41 N41 L41 AC33 G41 H41 F21 E21 G21 +V1.5_DPLLA C175 0.1U C178 0.022U +2.5V A38 B39 +V1.5_MPLL +V1.5_DPLLB +V1.5_HPLL B26 C39 AF1 VCCSYNC VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2 VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_LVDS VSSA_LVDS VCCA_MPLL VCCA_TVBG VSSA_TVBG VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76+1.05V+1.05V AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1+ C155 470U L13DC165 10U/U Change part number +V1.5_DPLLBC183 0.1UC180 0.022U +V3.3_ATVBG+2.5V +2.5V+V1.5_PCIEC210 C242 C253 4.7U/6.3V/U/6.3V0.1UC160 10U/X6S10uH/0805+V3.3_ATVBG +V1.5_3GPLL C184 0.1U C196 0.022U +V3.3_ATVBG +V3.3_ATVBG +V2.5_CRTDAC C182 0.1U C191 0.022U +V3.3_ATVBG +V3.3_ATVBG C161 0.1U C143 10U/X6S C151 0.1UD+ C132 470U L16 FCM C156 0.1U +V1.5_HPLL+1.05VC177 0.22UC188 0.22UC259 0.47UC207 0.47UC266 10U/X6S L15 FCMC261 0.1U +V1.5_MPLL+2.5V22U in Capell Rev0.93C262 10U/X6SC248 0.1UC164 0.01UC163 0.1UAF2 H20 G20 +V3.3_ATVBGC179 0.1UC174 4.7U+V3.3_ATVBG +2.5VCR371 10 L41 FCM25milsVCCGFOLLOW 1D12 PDZ5.6B 2+1.05V E19 F19 C20 D20 E20 F20 AH1 AH2 A28 B28 C28 +V1.5_TVDAC D21 +3V C169 C170 10U/X6S 0.1U C256 0.1U C263 10U/X6S 40mils +1.5V_AUX AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19 P19 P16 AH15 P15 AH14 AG14 AF14 AE14 Y14 AF13 AE13 AF12 AE12 AD12 +V1.5_QTVDAC H19 A23 B23 B25 VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 VCCD_HMPLL0 VCCD_HMPLL1 VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 VCCD_TVDAC VCC_HV0 VCC_HV1 VCC_HV2 VCCD_QTVDAC VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40 Calistoga+V2.5_CRTDACC486 0.1UC190 0.022U+V3.3_ATVBG +V3.3_ATVBG +1.5VCPOWER+V1.5_PCIE L10 100nH60milsR134 0/A PCIE_L ++1.5V+3V+1.5VRC0805C145 220UC142 10U/X6SC141 10U/X6S+V1.5_3GPLL R137 0.5/F60mils 60milsL12 1uH 3GPLL_FB_R 3GPLL_FB_L R138 0/A+1.5VBRC080560mils+V1.5_TVDAC +1.5V_AUX R133 0 +1.5V L42 V15_TVDAC_R FCM C473 0.022U C471 0.1U R378 0/A +1.5VBVTT_56 , VTT_71 and 72 are attached with 0.1u seperated .CheckingRC0805RC0805C146 0.1U +3V +1.5V+V1.5_QTVDAC L4330milsD13 V1_5SFOLLOW R395 10APDZ5.6B 2 C187 0.022U C181 0.1UFCM1+V3.3_TVDACR3920/AARC0805+1.05V +1.5V +V1.5_PCIE +2.5V +3V+1.05V (4,5,6,7,9,10,14,17,31,36) +1.5V (6,15,17,19,31,36) +V1.5_PCIE (9) +2.5V (30,32) +3V (4,5,9,10,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37)PROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberGMCH POWER (5 OF 6)Friday, July 29, 2005 Sheet1Rev 1A of 3811543254321U35I AC41 AA41 W41 T41 P41 M41 J41 F41 AV40 AP40 AN40 AK40 AJ40 AH40 AG40 AF40 AE40 B40 AY39 AW39 AV39 AR39 AN39 AJ39 AC39 AB39 AA39 Y39 W39 V39 T39 R39 P39 N39 M39 L39 J39 H39 G39 F39 D39 AT38 AM38 AH38 AG38 AF38 AE38 C38 AK37 AH37 AB37 AA37 Y37 W37 V37 T37 R37 P37 N37 M37 L37 J37 H37 G37 F37 D37 AY36 AW36 AN36 AH36 AG36 AF36 AE36 AC36 C36 B36 BA35 AV35 AR35 AH35 AB35 AA35 Y35 W35 V35 T35 R35 P35 N35 M35 L35 J35 H35 G35 F35 D35 AN34 VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 Calistoga VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23 AT23 AN23 AM23 AH23 AC23 W23 K23 J23 F23 C23 AA22 K22 G22 F22 E22 D22 A22 BA21 AV21 AR21 AN21 AL21 AB21 Y21 P21 K21 J21 H21 C21 AW20 AR20 AM20 AA20 K20 B20 A20 AN19 AC19 W19 K19 G19 C19 AH18 P18 H18 D18 A18 AY17 AR17 AP17 AM17 AK17 AV16 AN16 AL16 J16 F16 C16 AN15 AM15 AK15 N15 M15 L15 B15 A15 BA14 AT14 AK14 AD14 AA14 U14 K14 H14 E14 AV13 AR13 AN13 AM13 AL13 AG13 P13 F13 D13 B13 AY12 AC12 K12 H12 E12 AD11 AA11 Y11U35J VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 Calistoga VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 J11 D11 B11 AV10 AP10 AL10 AJ10 AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1DDVSSVSSCCBBAAPROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberGMCH GND(6 OF 6)Friday, July 29, 2005 Sheet1Rev 1A 12 of 38543212345678+3V 1.8VSUSA+3V (4,5,9,10,11,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37) 1.8VSUS (9,10,30,31,35) SMDDR_VREF 1.8VSUS 1.8VSUS CN25 1 VREF VSS46 2 3 VSS47 4 DQ4 M_A_DQ0 5 DQ0 DQ5 6 M_A_DQ1 7 DQ1 VSS15 8 9 VSS37 DM0 10 M_A_DQS#0 11 DQS#0 VSS5 12 M_A_DQS0 13 DQS0 DQ6 14 15 VSS48 DQ7 16 M_A_DQ2 17 DQ2 VSS16 18 M_A_DQ3 19 DQ3 DQ12 20 21 VSS38 DQ13 22 M_A_DQ8 23 DQ8 VSS17 24 M_A_DQ14 25 DQ9 DM1 26 27 VSS49 VSS53 28 M_A_DQS#1 29 DQS#1 CK0 30 M_A_DQS1 31 DQS1 CK0# 32 33 VSS39 VSS41 34 M_A_DQ15 35 DQ10 DQ14 36 M_A_DQ11 37 DQ11 DQ15 38 39 VSS50 VSS54 40 M_A_DQ17 M_A_DQ21 M_A_DQS#2 M_A_DQS2 M_A_DQ19 M_A_DQ22 M_A_DQ25 M_A_DQ24 M_A_DM3M_A_DM[0..7] (8) M_A_DQ[0..63] (8) M_A_DQS[0..7] (8) M_A_DQS#[0..7] (8) M_A_A[0..13] (8) M_A_DQ6 M_A_DQ4 M_A_DM0 M_A_DQ7 M_A_DQ5 M_A_DQ13 M_A_DQ12 M_A_DM1 M_CLK_DDR0 M_CLK_DDR#0 M_A_DQ9 M_A_DQ10 M_CLK_DDR0 (9) M_CLK_DDR#0 (9) SMDDR_VTERM SMDDR_VTERM M_A_DQ20 M_A_DQ16 PM_EXTTS#0 M_A_DM2 M_A_DQ18 M_A_DQ23 M_A_DQ29 M_A_DQ28 M_A_DQS#3 M_A_DQS3 M_A_DQ26 M_A_DQ31 M_CKE1 M_CKE1 (9) M_ODT0 M_A_A13 M_A_A8 M_A_A5 M_A_A3 M_A_A1 M_CKE1 M_A_A11 M_A_A10 M_A_BS#0 M_A_A7 M_A_A6 M_A_A4 M_A_A2 M_A_A0 M_A_BS#1 M_A_A12 M_A_A9 M_A_WE# M_A_CAS# M_A_RAS# M_CS#0 M_CS#1 M_ODT1 M_CKE0 M_A_BS#2 RP44 RP26 RP27 RP39 RP28 RP40 RP41 RP42 RP25 RP29 RP43 RP30 RP24 PM_EXTTS#0 (9) C213 0.1U C511 0.1U SMDDR_VTERM SMDDR_VTERM1.8VSUSPlace these Caps near So-Dimm1.DDRII A CHANNELC487 0.1U C501 0.1U C492 0.1U C508 0.1U C516 0.1U C228 0.1U C226 0.1U C197 0.1U C243 0.1U C249 0.1U C247 0.1UC520 2.2UC510 2.2UC496 2.2UC483 2.2UC499 2.2U1.8VSUSPlace these Caps near So-Dimm1.AC506 0.1UC505 0.1UC514 0.1UC515 0.1UC488 0.1USMDDR_VREF C504 1000P C518 1000P C214 1000P C490 1000P C258 1000P C513 1000P C509 1000P C246 1000P C215 1000P C147 0.1U C140 2.2U+3VBM_A_DQ27 M_A_DQ30 (9) M_CKE0 (8) M_A_BS#2 M_CKE0 M_A_BS#2 M_A_A12 M_A_A9 M_A_A8 M_A_A5 M_A_A3 M_A_A1 M_A_A10 M_A_BS#0 M_A_WE# M_A_CAS# M_CS#1 M_ODT1 M_A_DQ36 M_A_DQ34(8) M_A_BS#0 (8) M_A_WE# (8) M_A_CAS# (9) M_CS#1 (9) M_ODT1CM_A_DQS#4 M_A_DQS4 M_A_DQ32 M_A_DQ39 M_A_DQ44 M_A_DQ45 M_A_DM5 M_A_DQ41 M_A_DQ43 M_A_DQ49 M_A_DQ48M_A_DQS#6 M_A_DQS6 M_A_DQ54 M_A_DQ50 M_A_DQ58 M_A_DQ59DM_A_DM7 M_A_DQ62 M_A_DQ63 (4,19,26) SMBDT (4,19,26) SMBCK +3V SMBDT SMBCK41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA142 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200C209 1000PC231 1000PC227 1000PC497 1000PPC4800 DDR2 SDRAM SO-DIMM (200P)C292 2.2UC285 0.1UPlace these Caps near So-Dimm1. No Vias Between the Trace of PIN to CAP.BM_A_A11 M_A_A7 M_A_A6 M_A_A4 M_A_A2 M_A_A0 M_A_BS#1 M_A_RAS# M_CS#0 M_ODT0 M_A_A13 M_A_BS#1 (8) M_A_RAS# (8) M_CS#0 (9) M_ODT0 (9)1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 32 56X2 4 2 56X2 4 2 56X2 4 2 4 2 4 2 4 2 456X2 56X2 56X2 56X2SMDDR_VTERMSMDDR_VTERM2 56X2 4 2 56X2 4 2 56X2 4 2 56X2 4 2 56X2 4 2 56X2 4SMDDR_VTERMM_A_DQ38 M_A_DQ33 M_A_DM4 M_A_DQ37 M_A_DQ35 M_A_DQ42 M_A_DQ40 M_A_DQS#5 M_A_DQS5 M_A_DQ47 M_A_DQ46 M_A_DQ53 M_A_DQ52 M_CLK_DDR1 M_CLK_DDR#1 M_A_DM6 M_A_DQ51 M_A_DQ55 M_A_DQ57 M_A_DQ60 M_A_DQS#7 M_A_DQS7 M_A_DQ61 M_A_DQ56 R438 R443 10K 10K M_CLK_DDR1 (9) M_CLK_DDR#1 (9)CSMDDR_VTERMSMDDR_VTERM SMDDR_VREFSMDDR_VTERM (32,35) SMDDR_VREF (9,35)DDDR2_SODIMMCLOCK 0,1CKE 0,11 2PROJECT : OT1 Quanta Computer Inc.Size Custom Date: Document NumberH 5.2SMbus address A03 4 5 6DDR SO-DIMM(200P)Friday, July 29, 20057Rev 1A 138Sheetof3854321RTC3VPCUVCCRTC +3VVCCRTC D9 CH500H-40 R310 20KC389 1UDB2 stage:C78,C79C78 18P 1 Y4 32.768KHZ 2 1 CLK_32KX1change to 18PR309 10K +3V +3VD7/12/2005DVCCRTC_2 D11 CH500H-40 R326 1K CN22 1 2 BAT_CONN R304 1M/F C390 1U 2G2 SHORT_ PAD1R98 10M U10A CLK_32KX2 RTCRST# SM_INTRUDER# ICH_INTVRMEN AB1 AB2 AA3 Y5 W4 W1 Y1 Y2 W3 V3 U3 RTXC1 RTCX2 RTCRST# INTRUDER# INTVRMEN EE_CS EE_SHCLK EE_DOUT EE_DIN LAN_CLK LAD0 LAD1 LAD2 LAD3 LDRQ0# LDRQ1#/GPIO23 LFRAME# A20GATE A20M# CPUSLP# AA6 AB5 AC4 Y6 AC3 AA5 AB3 AE22 AH28 AG27 AF24 AH25 AG26 AG24 AG22 AG21 AF22 AF25 AG23 AH24 AF23 AH22 AF26 AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15 AH17 AE17 AF17 AE16 AD16 H_IGNNE# FWH_INIT# H_INIT# H_INTR LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LDRQ#0 LDRQ#1LDRQ#1 R302 10K LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LDRQ#0 LFRAME#/FWH4 (19,25,28,30) GATEA20 (25) H_A20M# (5) R290 R317 R316 *0/F *0/F *0/F H_CPUSLP# (5,7) ICH_DPRSTP# (5) H_DPSLP# (5) R299 56/F H_FERR# (5) R301 0/F H_PWRGD (5) H_IGNNE# (5) FWH_INIT# (30) H_INIT# (5) H_INTR (5) KBCCPURST# (25) R303 0/F H_NMI (5) H_SMI# (5) H_STPCLK# (5) R312 PDD[15:0] (27) 24.9/F PM_THRMTRIP# (5,9) R315 56/FCR318 10KC79 18PRTC LPC(19,25,28,30) (19,25,28,30) (19,25,28,30) (19,25,28,30)KBCCPURST# GATEA20 +1.05VLFRAME#/FWH4 GATEA20 H_A20M# TP_H_CPUSLP# H_DPRSTP#_R H_DPSLP#_R H_FERR#R333 *56/FR334 *56/F+1.05VFOR EMIC68CU5 V4 T5 C61 *10P C339 *10P R97 R82 R88 39 39 39 ACZ_BCLK ACZ_SYNC ACZ_RST# ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 39 39 39 39 39 ACZ_SDOUT U7 V6 V7 U1 R6 R5 T2 T3 T1 T4 AF18LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2LAN CPULAN_RSTSYNCTP1/DPRSTP# TP2/DPSLP# FERR# GPIO49/CPUPWRGD IGNNE# INIT3_3V# INIT# INTR RCIN# NMI SMI# STPCLK# THERMTRIP#C52 *10P*10P (23) ACZ_BITCLK_ADI (23) ACZ_SYNC_ADI (23) ACZ_RST_ADI# (23) ACZ_SDIN0 (28) ACZ_SDIN1AC-97/AZALIAACZ_BIT_CLK ACZ_SYNC ACZ_RST# ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDOUT SATALED# SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA2RXN SATA2RXP SATA2TXN SATA2TXP+1.05VKBCCPURST# H_NMI H_SMI#_R H_STPCLK# H_THERMTRIP_R PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDA0 PDA1 PDA2 PDCS1# PDCS3#T17 (23) ACZ_SDOUT_ADI (28) ACZ_BITCLK_MDC (28) ACZ_SYNC_MDC (28) ACZ_RST_MDC# (28) ACZ_SDOUT_MDC C345 C64 *10P *10P C54 *10P C66 *10P R275 R95 R85 R92 R276Should be 2& close ICH7AF3 AE3 AG2 AH2 AF7 AE7 AG6 AH6 AF1 AE1 AH10 AG10 PDIOR# PDIOW# PDDACK# IRQ14 PDIORDY PDDREQ AF15 AH15 AF16 AH16 AG16 AE150-AUDIO 1-MODEMBSATARBIASN SATARBIASP DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ ICH7-MSATAFOR EMISATA_CLKN SATA_CLKPDD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DA0 DA1 DA2 DCS1# DCS3#B(27) PDIOR# (27) PDIOW# (27) PDDACK# (27) IRQ14 (27) PDIORDY (27) PDDREQIDEPDA[2:0] (27)PDCS1# (27) PDCS3# (27)VCCRTC+3VICH7 internal VR enable strap STATUS Enable (default) DisableAINTVRMEN 1 0R279 332K ICH_INTVRMENR104 8.2KR105 4.7KR277 *0/FPDIORDY IRQ14APROJECT : OT1 Quanta Computer Inc.Size Custom Date:5 4 3 2Document NumberICH7-M HOST (1 OF 4)Friday, July 29, 2005 Sheet1Rev 1A 14 of 3854321U10DDirect Media InterfaceMINI CARD PCI-E(19) (19) (19) (19)PCIE_RXN0 PCIE_RXP0 PCIE_TXN0 PCIE_TXP0C319 C3160.1U 0.1UPCIE_RXN0 PCIE_RXP0 PCIE_TXN0_C PCIE_TXP0_CF26 F25 E28 E27 H26 H25 G28 G27 K26 K25 J28 J27 M26 M25 L28 L27PERn1 PERp1 PETn1 PETp1 PERn2 PERp2 PETn2 PETp2 PERn3 PERp3 PETn3 PETp3 PERn4 PERp4 PETn4 PETp4 PERn5 PERp5 PETn5 PETp5 PERn6 PERp6 PETn6 PETp6 SPI_CLK SPI_CS# SPI_ARB SPI_MOSI SPI_MISODMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP DMI_CLKN DMI_CLKPV26 V25 U28 U27 Y26 Y25 W28 W27 AB26 AB25 AA28 AA27 AD25 AD24 AC28 AC27 AE28 AE27 C25 D25 F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3 D2 D1DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3 CLK_PCIE_ICH# CLK_PCIE_ICH DRI_IRCOMP_R USBP0USBP0+ USBP1USBP1+ USBP2USBP2+ USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ USBP6USBP6+ USBP7USBP7+ USB_RBIAS_PNDMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3(9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) (9) +1.5V+3V RP31 REQ4# REQ1# DEVSEL# FRAME# +3V 6 7 8 9 10 8.2KX8 +3V RP32 LOCK# TRDY# INTE# INTG# +3V 6 7 8 9 10 8.2KX8 +3V RP33 REQ0# INTD# INTC# INTB# +3V 6 7 8 9 10 8.2KX8 3VSUS RP34 USBOC#3 USBOC#4 USBOC#0 3VSUS 6 7 8 9 10 8.2KX8 5 4 3 2 1 USBOC#2 USBOC#5 USBOC#7 USBOC#6 5 4 3 2 1 INTH# INTF# INTA# 5 4 3 2 1D5 4 3 2 1REQ2# REQ3# SERR# STOP#DPCI-ExpressPERR# IRDY# REQ5#3VSUSP26 P25 N28 N27 R272 10K R273 10K SPI_SCLK SPI_CS# SPI_ARB SPI_SI SPI_SO USBOC#0 USBOC#1 USBOC#2 USBOC#3 USBOC#4 USBOC#5 USBOC#6 USBOC#7 T25 T24 R28 R27 R2 P6 P1 P5 P2 D3 C4 D5 D4 E5 C3 A2 B3CLK_PCIE_ICH# (4) CLK_PCIE_ICH (4)R259 24.9/FDMI_ZCOMP DMI_IRCOMP USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBRBIAS# USBRBIAS15/15mils(28) (28) (28) (28) (28) (28) (28) (28) (31) (31) (19) (19)Place within 500 mils of ICH7R274 10K(30) SPI_CLK (30) SPI_CS# T16 (30) SPI_SI (30) SPI_SOCOC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 ICH7-MUSBP0USBP0+ USBP1USBP1+ USBP2USBP2+ USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ T13 T14 T78 T77SYSTEM(RIGHT) SYSTEM(LEFT) Bluetooth Module FINGER PRINT Docking Mini PCI-E 1SPI USBC25mils/15milsPlace within 500 mils of ICH7R54 22.6/F R43CKL use 10Kohm3VSUS8.2KUSB_OC1#USB_OC1# (28)(28) USBOC#1USBOC#1 C21 1000PR421K(20,22) AD[0..31]U10B AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 INTA# INTB# INTC# INTD# TP_ICH_RSVD1 TP_ICH_RSVD2 TP_ICH_RSVD3 TP_ICH_RSVD4 TP_ICH_RSVD5 E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10 E9 D9 B9 A8 A6 C7 B6 E6 D6 A3 B4 C5 B5 AE5 AD5 AG4 AH4 AD9 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 PIRQA# PIRQB# PIRQC# PIRQD# RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5] ICH7-M R34 *1K/F 3PCIBREQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3# REQ4#/GPIO22 GNT4#/GPIO48 GPIO1/REQ5# GPIO17/GNT5# C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME# GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8 B15 C12 D12 C15 A7 E10 B18 A12 C9 E11 B10 F15 F14 F16 C26 A9 B19 G8 F7 F8 G7 AE9 AG8 AH8 F21 AH20REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3# REQ4# GNT4# REQ5# GNT5# C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# LOCK# SERR# STOP# TRDY# FRAME# PLT_RST-R# PCLK_ICH PCI_PME# INTE# INTF# INTG# INTH# TP_ICH_RSVD6 TP_ICH_RSVD7 TP_ICH_RSVD8 RSVD9REQ0# GNT0# REQ1# GNT1# T71 T74(22) (22) (20) (20)ICH7 Boot BIOS selectPCLK_ICH R39 R40 R254 10K *1K *1K 10K +3V +3VICH7 Boot BIOS selectSTRAP LPC SPI GNT4# 1 0 GNT5# 1 1 (default)R41 *33BC/BE0# C/BE1# C/BE2# C/BE3#(20,22) (20,22) (20,22) (20,22)R44C20 *10PIRDY# (20,22) PAR (20,22) PCIRST# (20,22) DEVSEL# (20,22) PERR# (20,22) SERR# (20,22,25) STOP# (20,22) TRDY# (20,22) FRAME# (20,22) PLT_RST-R# (9) PCLK_ICH (4) PCI_PME# (20,22) INTE# (20) SES_INT (26) T84 T18 T20 +3VFOR EMIPCI DEVICES IRQ ROUTINGDEVICEGBIT ETHERNETC311 0.1U PLT_RST-R# 5Interrupt I/FIDSEL # REQ/GNT # PCI_INTAD16 AD25 0 1 B C,D,EA(22) INTB# (20) INTC# (20) INTD#AMISCRSVD[6] RSVD[7] RSVD[8] RSVD[9] MCH_SYNC#CardBusT86 T85 T21 T19 T83DB2 stage:connect to U157/15/ 1 MCH_ICH_SYNC (9)PLTRST# (16,19,25,27,28,30)U23 TC7SH08FU Size Custom Date: Document NumberPROJECT : OT1 Quanta Computer Inc.ICH7-M PCI E (2 OF 4)Friday, July 29, 2005 Sheet1Don't connect to PCI device / Express card5 4 3 2Rev 1A 15 of 38543213V_S5 3V_S5 PCLK_SMB PDAT_SMB R32 R17 R26 2.2K 2.2K 1K RI# SMB_LINK_ALERT# SMLINK0 SMLINK1 LID_SW# SMB_ALERT# R25 R15 R31 R33 R29 R18 10K 10K 10K 10K 10K 10K 3V_S5 +3V NBSWON# SYS_RST# R16 R19 *10K 10K CLKRUN# SERIRQ R102 R108 8.2K 8.2KDB2 stage:R26 pull hi to 3V_S5 DB2 stage:Delete R36DPCIE_WAKE#DB2 stage:Delete R28 7/12/2005C577 *0.1UD7/12/2005U10C +3V PCLK_SMB PDAT_SMB SMB_LINK_ALERT# SMLINK0 SMLINK1 RI# PCSPK SUS_STAT# SYS_RST# R20 *10K R278 0/F SMB_ALERT# R321 R319 No ASF support 0/F 0/F T7 (22) LP_EN# T68 (18) FPBACK_R (20,22,25,28) CLKRUN# (30) FWH_WP# (30) FWH_TBL# R320 10K/F (5) THERM_ALERT# (4) VR_PWRGD_CK410 +3V (25) RUNSCI_EC# (22,23,31) PR_INSERT# T75BEMI ADDRSMRST# R282 10KSMB+3V (23) PCSPKRI#A28 A19 A27 A22 AB18 B23RI# SPKR SUS_STAT# SYS_RST# GPIO0/BM_BUSY# GPIO11/SMBALERT#ClocksR38 *1K/FT62 T5 T6SATA GPIO(4) PCLK_SMB (4) PDAT_SMBC22 B22 A26 B25 A25SMBCLK SMBDATA LINKALERT# SMLINK0 SMLINK1GPIO21/SATA0GP GPIO19/SATA1GP GPIO36/SATA2GP GPIO37/SATA3GP CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5# PWROKAF19 AH18 AH19 AE19 AC1 B2 C20 B24 D23 F22 AA4 AC22 C21 C23 C19 Y4 E20 A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20R306 R308 R307 R305100 100 100 100 14M_ICH (4) CLKUSB_48 (4) T7314M_ICH CLKUSB_48R337 *10K/FCR322 *10K/F(25,28) SUS_STAT# (5) SYS_RST# +3V (9) PM_BMBUSY#SLP_S3# R267 R266*0 0 R336SLP_S3# (25,30) SLP_S5# (30)ICH_PWROK 0 0/F PM_DPRSLPVR_RDB2 stageR335 *100K PM_DPRSLPVR (9,37) BATLOW# (25)C(4) PM_STPPCI# (4) PM_STPCPU#PM_STPPCI_ICH# AC20 PM_STPCPU_ICH# AF21 A21 LP_EN# FPBACK_R CLKRUN# FWH_WP# FWH_TBL# PCIE_WAKE# SERIRQ THERM_ALERT# B21 E23 AG18 AC19 U2 F20 AH21 AF20GPIO18/STPPCI# GPIO20/STPCPU# GPIO26 GPIO27 GPIO28 GPIO32/CLKRUN#SYS GPIO Power MGTGPIO16/DPRSLPVR TP0/BATLOW# PWRBTN# LAN_RST# RSMRST#PM_BATLOW#_R NBSWON#R24NBSWON# (30) R30 100K PLTRST# (15,19,25,27,28,30) R280 T9 LOM_LOW_PWR (22) T63 LID_SW# (18) LAN_LED# (22,31) T70 RF_OFF# (19) BT_OFF# (28) T122 T82 100/F RSMRST# RSMRST# (25)DB2 stage:add GPIO27 pin funcion 7/12/2005+3VR270/FPM_RSMRST#_R GPIO9 LOM_LOW_PWR SB_GPIO12 LID_SW# LAN_LED# SB_GPIO15 RF_OFF# BT_OFF# SB_GPIO38 SB_GPIO39GPIO33/AZ_DOCK_EN# GPIO34/AZ_DOCK_RST# WAKE# SERIRQ THRM# VRMPWRGD GPIO6 GPIO7 GPIO8 ICH7-M(19) PCIE_WAKE# (20,25,28) SERIRQVR_PWRGD_CK410 AD22 R281 10K AC21 PR_INSERT# AC18 E21GPIOGPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25 GPIO35 GPIO38 GPIO39DB2 stage:Del GPIO9,add GPIO10(LOM_LOW_PWR) 7/12/2005DB2 stage:Pin AD21 change to test pad7/12/2005BSB_GPIO12R3710K3V_S5CLKUSB_48 R50 *1014M_ICH R283 *33DB2 stage:R37 pull hi to 3V_S5 7/12/20053VSUS 3VSUSC33 *10PC357 *10PC392 0.047U 5 DELAY_VR_PWRGOOD PWROK 5C360 0.047UFOR EMIICH_PWROK(9,37) DELAY_VR_PWRGOOD (25) PWROKA2 4 1 1 U31 TC7SH08FU (5) XDP_DBRESET# 3 2 4 U29 TC7SH08FUR311 100K3AR284 10KPROJECT : OT1 Quanta Computer Inc.Size B Date:5 4 3 2Document NumberICH7-M GPIO (3 OF 4)Friday, July 29, 2005 Sheet1Rev 1A 16 of 3854321U10E A4 A23 B1 B8 B11 B14 B17 B20 B26 B28 C2 C6 C27 D10 D13 D18 D21 D24 E1 E2 E4 E8 E15 F3 F4 F5 F12 F27 F28 G1 G2 G5 G6 G9 G14 G18 G21 G24 G25 G26 H3 H4 H5 H24 H27 H28 J1 J2 J5 J24 J25 J26 K24 K27 K28 L13 L15 L24 L25 L26 M3 M4 M5 M12 M13 M14 M15 M16 M17 M24 M27 M28 N1 N2 N5 N6 N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26 P3 P4 P12 P13 P14 P15 P16 P17 P24 P27 VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] ICH7-M VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[1}