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你可能喜欢P5, P54C, P54CTB, P54CS
60 MHz - 200 MHz
800 nm - 350 nm
50 MHz - 66 MHz
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350 nm - 250 nm
60 MHz - 66 MHz
Z5xx, Z6xx, N2xx, 2xx, 3xx, N4xx, D4xx, D5xx, N5xx, D2xxx, N2xxx
800&MHz - 2.13&GHz
Socket PBGA437,
Socket PBGA441, Socket micro-FCBGA8 559
32&nm, 45&nm
0.65&W - 13&W
400&MHz, 533&MHz, 667&MHz, 2.5&GT/s
512&KiB - 1&MiB
3xx, 4xx, 5xx
266&MHz - 3.6&GHz
45&nm, 65&nm, 90&nm, 130&nm, 180&nm, 250&nm
5.5&W - 86&W
66&MHz, 100&MHz, 133&MHz, 400&MHz, 533&MHz, 800&MHz
0&KiB - 1&MiB
150&MHz - 200&MHz
350&nm, 500&nm
29.2&W - 47&W
60&MHz, 66&MHz
256&KiB, 512&KiB, 1024&KiB
233&MHz - 450&MHz
250&nm, 350&nm
16.8&W - 38.2 W
66&MHz, 100&MHz
256&KiB - 512&KiB
450&MHz - 1.4&GHz
130&nm, 180&nm, 250&nm
17&W - 34.5&W
100&MHz, 133&MHz
256&KiB - 512&KiB
n3xxx, n5xxx, n7xxx
400&MHz - 4.4&GHz
45&nm, 65&nm, 90&nm, 130&nm, 180&nm, 250&nm
16&W - 165&W
Double, Quad, Hexa, Octa
100&MHz, 133&MHz, 400&MHz, 533&MHz, 667&MHz, 800&MHz, 1066&MHz, 1333&MHz, 1600&MHz, 4.8 GT/s, 5.86 GT/s, 6.4 GT/s
256&KiB - 12&MiB
4&MiB - 16&MiB
1.3&GHz - 3.8&GHz
65&nm, 90&nm, 130&nm, 180&nm
21&W - 115&W
400&MHz, 533&MHz, 800&MHz, 1066&MHz
256&KiB - 2&MiB
3.2&GHz - 3.73&GHz
90&nm, 130&nm
92&W - 115&W
800&MHz, 1066&MHz
512&KiB - 1&MiB
0&KiB - 2&MiB
800&MHz - 2.266&GHz
90&nm, 130&nm
5.5&W - 27&W
400&MHz, 533&MHz
1&MiB - 2&MiB
2.66&GHz - 3.73&GHz
65&nm, 90&nm
95&W - 130&W
533&MHz, 800&MHz, 1066&MHz
2&1&MiB - 2&2&MiB
E2xxx, E3xxx, E5xxx, T2xxx, T3xxx
1.6&GHz - 2.93&GHz
45&nm, 65&nm
10&W - 65&W
533&MHz, 667&MHz, 800&MHz, 1066&MHz
1&MiB - 2&MiB
E5xxx, E6xxx, T4xxx, SU2xxx, SU4xxx, G69xx, P6xxx, U5xxx, G6xx, G8xx, B9xx
1.2&GHz - 3.33&GHz
32&nm, 45&nm, 65&nm
5.5&W - 73&W
800&MHz, 1066&MHz, 2.5GT/s, 5 GT/s
2x256&KiB - 2&MiB
0&KiB - 3&MiB
Txxxx, Lxxxx, Uxxxx
1.06&GHz - 2.33&GHz
5.5&W - 49&W
533&MHz, 667&MHz
Uxxxx, Lxxxx, Exxxx, Txxxx, P7xxx, Xxxxx, Qxxxx, QXxxxx
1.06&GHz - 3.33&GHz
45&nm, 65&nm
5.5 W - 150 W
Double, Quad
533&MHz, 667&MHz, 800&MHz, 1066&MHz, 1333&MHz, 1600&MHz
1&MiB - 12&MiB
i3-xxx, i3-2xxx, i3-3xxx
2.4&GHz - 3.4&GHz
22&nm, 32&nm
35&W - 73&W
1066&MHz, 1600&MHz, 2.5 - 5&GT/s
3&MiB - 4&MiB
i5-7xx, i5-6xx, i5-2xxx, i5-3xxx
1.06&GHz - 3.46&GHz
22&nm, 32&nm, 45&nm
17&W - 95&W
2.5 - 5&GT/s
4&MiB - 8&MiB
i7-6xx, i7-7xx, i7-8xx, i7-9xx, i7-2xxx, i7-37xx, i7-38xx, i7-47xx
,&,,&,,,&,&
1.6&GHz - 3.6&GHz
22&nm, 32&nm, 45&nm
45&W - 130&W
4.8 GT/s, 6.4 GT/s
6&MiB - 10&MiB
i7-970, i7-980, i7-980x, i7-990x, i7-39xx, i7-38xx
3.2 GHz - 3.46&GHz
12&MiB - 15&MiB
ProcessorSeries NomenclatureCode NameSupported Features (Instruction Set)Clock RateSocketFabricationTDPNumber of CoresBus SpeedL2 CacheL3 Cache
Architectural changeFabrication processMicroarchitectureCodenamesRelease dateProcessors
8P/4P Server4P/2P Server/WSEnthusiast/WSDesktopMobileMarketing names
January 5, 2006
New microarchitecture
July 27, 2006
Die shrink
November 11, 2007
New microarchitecture
November 17, 2008
Die shrink
January 4, 2010
New microarchitecture
January 9, 2011
Die shrink
April 29, 2012
Ivy Bridge-EX
Ivy Bridge-EP
Ivy Bridge-E
New microarchitecture
June 2, 2013
Haswell-DT
Haswell-MB (notebooks)
Haswell-LP (ultrabooks)
Die shrink
New microarchitecture
Die shrink
New microarchitecture
Die shrink
New microarchitecture
Die shrink
New microarchitecture
The&Xeon&&is a brand of multiprocessing- or multi-socket-capable&&&from&&targeted at the non-consumer&,&, and&&markets.
The&Xeon&brand has been maintained over several generations of x86 and&&processors. Older models added the&Xeon&moniker to the end of the name of their corresponding desktop processor, but more recent models used the name&Xeon&on its own. The&Xeon&CPUs generally have more&&than their desktop counterparts in addition to multiprocessing capabilities.
Intel Xeon processor family
&& (UP/DP)
seriesServer & (MP) 7000 series
Code-namedCoreDate releasedCode-namedCoreDate released
TannerCascades
(250&nm)(180&nm)
Mar 1999Oct 1999
FosterPrestoniaGallatinNoconaIrwindalePaxvilleDempsey
(180&nm)(130&nm)(130&nm)(90&nm)(90&nm)dual (90&nm)dual (65&nm)
May 2001Feb 2002Mar 2003Jun 2004Feb 2005Oct 2005May 2006
Foster MPGallatin MPCranfordPotomacPaxville MPTulsa
(180&nm)(130&nm)(90&nm)(90&nm)dual (90&nm)dual (65&nm)
Mar 2002Nov 2002Mar 2005Mar 2005Dec 2005Aug 2006
SossamanWoodcrestConroeAllendaleWolfdaleKentsfieldYorkfield
dual (65&nm)dual (65&nm)dual (65&nm)dual (65&nm)dual (45&nm)quad (65&nm)quad (45&nm)
Mar 2006Jun 2006Oct 2006Jan 2007Feb 2008Jan 2007Mar 2008
TigertonDunningtonDunnington
dual (65&nm)quad (45&nm)six (45&nm)
Sep 2007Sep 2008Sep 2008
Wolfdale DPClovertownHarpertownNehalem-EPBloomfieldBeckton (65xx)Westmere-EX (E7-2xxx)Sandy Bridge-EP
dual (45&nm)quad (65&nm)quad (45&nm)dual/quad (45&nm)quad (45&nm)quad/six/eight (45&nm)six/eight/ten (32&nm)dual/quad/six/eight (32&nm)
Nov 2007Nov 2006Nov 2007Mar 2009Mar 2009Mar 2010Apr 2011Mar 2012
Beckton (75xx)Westmere-EX (E7-4xxx/8xxx)
quad/six/eight (45&nm)six/eight/ten (32&nm)
Mar 2010Apr 2011
Pentium II Xeon[]
A 450 MHz Pentium II Xeon with a 512 kB L2 cache. The cartridge cover has been removed.
The first Xeon-branded processor was the Pentium II Xeon (code-named "Drake"). It was released in 1998, replacing the&in Intel's server lineup. The Pentium II Xeon was a ""&&(and shared the same product code: 80523) with a full-speed 512&kB, 1&MB, or 2&MB&. The L2 cache was implemented with custom 512 kB SRAMs developed by Intel. The number of SRAMs depended on the amount of cache. A 512 kB configuration required one SRAM, a 1 MB configuration: two SRAMs, and a 2 MB configuration: four SRAMs on both sides of the PCB. Each SRAM was a 12.90&mm by 17.23&mm (222.21&mm²) die fabricated in a 0.35&&m four-layer metal CMOS process and packaged in a cavity-down wire-bonded&&(LGA).The additional cache required a larger module and thus the Pentium II Xeon used a larger slot,&. It was supported by the&&dual-processor workstation&&and the&&quad- or octo-processor chipset.
Pentium III Xeon[]
In 1999, the&&Xeon was replaced by the&&Xeon. Reflecting the incremental changes from the Pentium II "" core to the Pentium III "" core, the first Pentium III Xeon, named "Tanner", was just like its predecessor except for the addition of&&(SSE) and a few cache controller improvements. The product codes forTanner&mirrored that of&Katmai; 80525.
The second version, named "Cascades", was based on the Pentium III "" core. The "Cascades" Xeon used a 133&MHz bus and relatively small 256&kB on-die L2 cache resulting in almost the same capabilities as the&&Coppermine&processors, which were capable of dual-processor operation but not quad-processor operation.
To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2&MB". That came in two variants: with 1&MB or 2&MB of L2 cache. Its bus speed was fixed at 100&MHz, though in practice the cache was able to offset this. The product code forCascades&mirrored that of&Coppermine; 80526.
In mid-2001, the Xeon brand was introduced ("Pentium" was dropped from the name). The initial variant that used the new&, "Foster", was slightly different from the desktop&&(""). It was a decent chip for workstations, but for server applications it was almost always outperformed by the older Cascades cores with a 2 MB L2 cache and AMD's&. Combined with the need to use expensive&, the Foster's sales were somewhat unimpressive.
At most two Foster processors could be accommodated in a symmetric multiprocessing () system built with a mainstream chipset, so a second version (Foster MP) was introduced with a 1&MB L3 cache and the Jackson&&capacity. This improved performance slightly, but not enough to lift it out of third place. It was also priced much higher than the dual-processor (DP) versions. The&Foster&shared the 80528 product code with Willamette.
In 2002 Intel released a&&version of Xeon branded CPU, codenamed "Prestonia". It supported Intel's new Hyper-Threading technology and had a 512&kB L2 cache. This was based on the "" Pentium 4 core. A new server chipset,&&(which allowed the use of dual-channel&), was released to support this processor in servers, and soon the bus speed was boosted to 533&MT/s (accompanied by new chipsets: the E7501 for servers and the E7505 for workstations). The&Prestonia&performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP branded CPUs (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor.
"Gallatin"[]
Subsequent to the&Prestonia&was the "Gallatin", which had an L2 cache of 1&MB or 2&MB. Its Xeon MP version also performed much better than the&Foster MP, and was popular in servers. Later experience with the 130&nm process allowed Intel to create the Xeon MP branded&Gallatin&with 4&MB cache. The Xeon branded&Prestonia&and&Gallatin&were designated 80532, like Northwood.
Main article:&
Due to a lack of success with Intel's&&and Itanium 2 processors, AMD was able to introduce&, a 64-bit extension to the&. Intel followed suit by including&&(formerly EM64T; it is almost identical to) in the&&version of the Pentium 4 (""), and a Xeon version codenamed "Nocona" with 1 MB L2 cache was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for&,&&and&. The Xeon was noticeably slower than AMD's Opteron, although it could be faster in situations where Hyper-Threading came into play.
A slightly updated core called "Irwindale" was released in early 2005, with 2 MB L2 cache and the ability to have its clock speed reduced during low processor demand. Although it was a bit more competitive than the&Nocona&had been, independent&&showed that AMD's Opteron still outperformed&Irwindale. Both of these Prescott-derived Xeons have the product code 80546.
Main article:&
64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of&Nocona, while the more expensive "Potomac" was a&Cranford&with 8&MB of L3 cache. Like Nocona and Irwindale, they also have product code 80546.
The first&&CPU branded Xeon, codenamed&Paxville DP, product code 80551, was released by Intel on 10 October 2005. Paxville DP had&, and was a dual-core equivalent of the single-core&&(related to the&&branded "") with 4&MB of L2 Cache (2&MB per core). The only Paxville DP model released ran at 2.8&GHz, featured an 800&MT/s front side bus, and was produced using a&.&[]
An MP-capable version of Paxville DP, codenamed&Paxville MP, product code 80560, was released on 1 November 2005. There are two versions: one with 2&MB of L2 Cache (1&MB per core), and one with 4&MB of L2 (2&MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90&nm process. Paxville MP clock ranges between 2.67&GHz and 3.0&GHz (model numbers ), with some models having a 667&MT/s FSB, and others having an 800&MT/s FSB.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
Released on 29 August 2006,&the 7100 series, codenamed&Tulsa&(product code 80550), is an improved version of Paxville MP, built on a 65&nm process, with 2&MB of L2 cache (1&MB per core) and up to 16&MB of L3 cache. It uses&. Tulsa was released in two lines: the N-line uses a 667&MT/s FSB, and the M-line uses an 800&MT/s FSB. The N-line ranges from 2.5&GHz to 3.5&GHz (model numbers N), and the M-line ranges from 2.6&GHz to 3.4&GHz (model numbers M). L3 cache ranges from 4&MB to 16&MB across the models.
ModelSpeed (GHz)L2 Cache (MB)L3 Cache (MB)FSB (MHz)TDP (W)
On 23 May 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed&Dempsey&(product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a&&processor produced using a&, and is virtually identical to Intel's ""&, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50&GHz and 3.73&GHz (model numbers ). Some models have a 667&MT/s FSB, and others have a 1066&MT/s FSB. Dempsey has 4&MB of L2 Cache (2&MB per core). A Medium Voltage model, at 3.2&GHz and 1066&MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors:&, also known as&Socket J. Dempsey was the first Xeon core in a long time to be somewhat competitive with its Opteron-based counterparts, although it could not claim a decisive lead in any performance metric & that would have to wait for its successor, the Woodcrest.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
LV (ULV), "Sossaman"[]
On 14 March 2006, Intel released a dual-core processor codenamed&Sossaman&and branded as&Xeon&LV (low-voltage). Subsequently an ULV (ultra-low-voltage) version was released. The&Sossaman&was a low-/ultra-low-power and double-processor capable CPU (like&), based on the "" processor, for ultradense non-consumer environment (i.e. targeted at the blade-server and embedded markets), and was rated at a&&(TDP) of 31 W (LV: 1.66&GHz, 2&GHz and 2.16&GHz) and 15 W (ULV: 1.66&GHz).&As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667&MT/s front side bus, and dual-core processing, but did not support 64-bit operations, so could not run 64-bit server software, such as&, and therefore was limited to 16&GB of memory. A planned successor, codenamed "&MP" was to be a drop-in upgrade to enable&Sossaman-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the&&processor leaving the&Sossaman&at a dead-end with no upgrade path.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
3000-series "Conroe"[]
Main article:&
The 3000 series, codenamed&Conroe&(product code 80557) dual-core Xeon (branded) CPU,&released at the end of September 2006, was the first Xeon for single-CPU operation. The same processor is branded as&&or as&and&, with varying features disabled. They use&&(Socket T), operate on a 1066&MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Conroe Processors with a number ending in "5" have a 1333&MT/s FSB.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
Models marked with a star are not present in Intel's database
3100-series "Wolfdale"[]
Main article:&
The 3100 series, codenamed&Wolfdale&(product code 80570) dual-core Xeon (branded) CPU, was just a rebranded version of the Intel's mainstream&E and&&E5000 processors, featuring the same&&and 6&MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use&&(Socket T), operate on a 1333&MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
5100-series "Woodcrest"[]
On 26 June 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed&Woodcrest&(product code 80556); it was the first Intel&&processor to be launched on the market. It is a server and workstation version of the&&processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.
Most models have a 1333&MT/s FSB, except for the 5110 and 5120, which have a 1066&MT/s FSB. The fastest processor (5160) operates at 3.0&GHz. All Woodcrests use&&and all except two models have a TDP of 65&W. The 5160 has a TDP of 80&W and the 5148LV (2.33&GHz) has a TDP of 40&W. The previous generation Xeons had a TDP of 130&W. All models support Intel 64 (Intel's x86-64 implementation), the&, and&, with the "" power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4&MB of shared L2 Cache.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
5200-series "Wolfdale-DP"[]
On 11 November 2007, Intel released the dual-core CPU (Xeon branded 5200 series) codenamed&Wolfdale-DP&(product code 80573).&It is built on a&&like the desktop Core 2 Duo and Xeon-SP&, featuring Intel 64 (Intel's x86-64 implementation), the&, and&. It is unclear whether the "Demand Based Switching" power management is available on the L5238.&Wolfdale has 6&MB of shared L2 Cache.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
7200-series "Tigerton"[]
Main section:&
The 7200 series, codenamed&Tigerton&(product code 80564) is an MP-capable processor, similar to the&&series, but, in contrast, only one core is active on each silicon chip, and the other one is turned off (blocked), resulting as a dual-core capable processor.&&
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
3200-series "Kentsfield"[]
Main article:&
Intel released relabeled versions of its quad-core (2&2) Core 2 Quad processor as the Xeon 3200-series (product code 80562) on 7 January 2007.&The 2&&&2 "quad-core" (dual-die dual-core) comprised two separate dual-core die next to each other in one CPU package. The models are the X3210, X3220 and X3230, running at 2.13&GHz, 2.4&GHz and 2.66&GHz, respectively.&Like the 3000-series, these models only support single-CPU operation and operate on a 1066&MHz front-side bus. It is targeted at the "blade" market. The X3220 is also branded and sold as&, the X3230 as Q6700.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
3300-series "Yorkfield"[]
Main article:&
Intel released relabeled versions of its quad-core&&Q9400 and Q9x50 processors as the Xeon 3300-series (product code 80569). It comprised two separate dual-core dies next to each other in one CPU package and manufactured&in a&. The models are the X3320, X3350, X3360, X3370 and X3380, running at 2.50&GHz, 2.66&GHz, 2.83&GHz, 3.0&GHz, and 3.16&GHz, respectively. The L2 cache is a unified 6&MB per die (except for the X3320 with a smaller 3&MB L2 cache per die), and a front-side bus of 1333&MHz. All models feature Intel 64 (Intel's x86-64 implementation), the&, and&, as well as "Demand Based Switching".
The&&(product code 80584) variant of these processors are X3323, X3353 and X3363, a reduced TDP of 80W and are made for single-CPU&&systems instead of&, which is used in all other Yorkfield processors. Otherwise they are identical to their Yorkfield counterparts.
5300-series "Clovertown"[]
A quad-core (2&2) successor of the Woodcrest for DP segment, consisting of two dual-core Woodcrest chips in one package similarly to the dual-core Pentium D branded CPUs (two single-core chips) or the quad-core&. All Clovertowns use the&&package. The Clovertown has been usually implemented with two Woodcrest dies on a&, with 8&MB of L2 cache (4&MB per die). Like Woodcrest, lower models use a 1066&MT/s FSB, and higher models use a 1333&MT/s FSB. Intel released&Clovertown, product code 80563, on 14 November 2006&with models E5310, E5320, E5335, E5345, and X5355, ranging from 1.6&GHz to 2.66&GHz. All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT. The E and X designations are borrowed from Intel's Core 2 mo an ending of &0 implies a 1066&MT/s FSB, and an ending of &5 implies a 1333&MT/s FSB.&All models have a TDP of 80&W with the exception of the X5355, which has a TDP of 120&W. A low-voltage version of Clovertown with a TDP of 50&W has a model numbers L5310, L5320 and L&GHz, 1.86&GHz and 2.0&GHz respectively). The 3.0&GHz X5365 arrived in July 2007, and became available in the&&&&on 4 April 2007.&The X5365 performs up to around 38&&in the LINPACK benchmark.&
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
5400-series "Harpertown"[]
On 11 November 2007 Intel presented&-based Xeons & called Harpertown (product code 80574) & to the public.&This family consists of dual die quad-core CPUs manufactured on a&&and featuring 1066&MHz, 1333&MHz, 1600&MHz front-side buses, with TDP rated from 40&W to 150&W depending on the model. These processors fit in the&package. All models feature Intel 64 (Intel's x86-64 implementation), the&, and&. All except the E5405 and L5408 also feature&.&The supplementary character in front of the model-number represents the thermal rating: an L depicts a TDP of 40&W or 50&W, an E depicts 80&W whereas an X is 120&W TDP or above. The speed of 3.00&GHz comes as four models, two models with 80&W TDP two other models with 120&W TDP with 1333&MHz or 1600&MHz front-side bus respectively. The fastest Harpertown is the X5492 whose TDP of 150&W is higher than those of the Prescott-based Xeon DP but having twice as many cores. (The X5482 is also sold under the name "Core 2 Extreme QX9775" for use in the&&system.)
Intel 1600&MHz front-side bus Xeon processors will drop into the Intel 5400 (Seaburg) chipset whereas several mainboards featuring the Intel -chipset are enabled to run the processors with a 1333&MHz front-side bus speed. Seaburg features support for dual&PCIe 2.0 x16&slots and up to 128&GB of memory.
ModelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
7300-series "Tigerton"[]
The 7300 series, codenamed&Tigerton&(product code 80565) is a four-socket (packaged in&) and more capable, consisting of two&&Core2 architecture silicon chips on a single ceramic module, similar to Intel's Xeon 5300 series Clovertown processor modules.
The 7300 series uses Intel's Caneland (Clarksboro) platform.
Intel claims the 7300 series Xeons offer more than twice the performance per watt as Intel's previous generation 7100 series. The 7300 series' Caneland chipset provides a point to point interface allowing the full front side bus bandwidth per processor.
The 7xxx series is aimed at the large server market, supporting configurations of up to 32&CPUs per host.
modelSpeed (GHz)L2 Cache (MB)FSB (MHz)TDP (W)
7400-series "Dunnington"[]
Dunnington&& the last CPU of the Penryn generation and Intel's first&&(above two) die & features a single-die six- (or&hexa-) core design with three unified 3&MB L2 caches (resembling three merged&&dual-core Wolfdale dies), and 96&kB L1 cache (Data) and 16&MB of L3 cache. It features 1066&MHz&, fits into the Tigerton's mPGA604 socket, and is compatible with the both the Intel Caneland, and IBM X4 chipsets. These processors support DDR2-&MHz), and have a maximum&&below 130&W. They are intended for blades and other stacked computer systems. Availability was scheduled for the second half of 2008. It was followed shortly by the&.
Announced on 15 Sep 2008.&
modelSpeed (GHz)L3 Cache (MB)FSB (MHz)TDP (W)Cores
3400-series "Lynnfield"[]
Main article:&
Xeon 3400-series processors based on&Lynnfield&fill the gap between the previous 3300-series "Yorkfield" processors and the newer 3500-series "Bloomfield". Like Bloomfield, they are quad-core single-package processors based on the&, but were introduced almost a year later, in September 2009. The same processors are marketed for mid-range to high-end desktops systems as&&and&. They have two integrated memory channels as well as&and&&(DMI) links, but no&&(QPI) interface.
3400-series "Clarkdale"[]
Main article:&
At low end of the 3400-series is not a Lynnfield but a&Clarkdale&processor, which is also used in the Core i3-500 and Core i5-600 processors as well as the Celeron G1000 and G6000 Pentium series. A single model was released in March 2010, the Xeon L3406. Compared to all other Clarkdale-based products, this one does not support integrated graphics, but has a much lower thermal design power of just 30 W. Compared to the Lynnfield-based Xeon 3400 models, it only offers two cores.
3500-series "Bloomfield"[]
Main article:&
Bloomfield&is the codename for the successor to the Xeon Core microarchitecture, is based on the&&and uses the same&manufacturing methods as Intel's&. The first processor released with the Nehalem architecture is the desktop&, which was released in November 2008. This is the server version for single CPU systems. This is a&single-socket&Intel Xeon processor. The performance improvements over previous Xeon processors are based mainly on:
Integrated&&supporting three memory channels of&&UDIMM (Unbuffered) or RDIMM (Registered)
A new point-to-point processor interconnect&, replacing the legacy front side bus
Simultaneous multithreading by multiple cores and&&(2& per core).
modelSpeed (GHz)L3 Cache (MB)QPI speed (GT/s)DDR3 Clock (MHz)TDP (W)CoresThreads
5500-series "Gainestown"[]
Gainestown or&Nehalem-EP, the successor to the Xeon Core microarchitecture, is based on the&and uses the same&&manufacturing methods as Intel's&. The first processor released with the Nehalem microarchitecture is the desktop&, which was released in November 2008. Server processors of the Xeon 55xx range were first supplied to testers in December 2008.
The performance improvements over previous Xeon processors are based mainly on:
Integrated&&supporting three memory channels of&&SDRAM.
A new point-to-point processor interconnect&, replacing the legacy front side bus. Gainestown has two QuickPath interfaces.
&(2& per core, starting from 5518), that was already present in pre-Core Duo processors.
ModelSpeed (GHz)L3 Cache (MB)QPI speed (GT/s)DDR3 Clock (MHz)TDP (W)CoresThreadsTurbo-Boost
C-series "Jasper Forest"[]
Jasper Forest&is a Nehalem-based embedded processor with&&connections on-die, core counts from 1 to 4 cores and power envelopes from 23 to 85 watts.
The uni-processor version without QPI comes as LC35xx and EC35xx, while the dual-processor version is sold as LC55xx and EC55xx and uses QPI for communication between the processors. Both versions use a DMI link to communicate with the 3420 that is also used in the 3400-series Lynfield Xeon processors, but use an&&package that is otherwise used for processors with QPI but no DMI or PCI Express links. The CPUID code of both Lynnfield and Jasper forest is 106Ex, i.e. family 6, model 30.
The&&P1053 belongs into the same family as the LC35xx series, but lacks some&&features that are present in the Xeon version.
-series "Gulftown" & "Westmere-EP"[]
Main article:&
Gulftown or&Westmere-EP, a six-core 32&nm&-based processor, is the basis for the Xeon 36xx and 56xx series and the&-980X. It launched in the first quarter of 2010. The 36xx-series follows the 35xx-series Bloomfield uni-processor model while the 56xx-series follows the 55xx-series Gainestown dual-processor model and both are socket compatible to their predecessors.
ModelSpeed (GHz)L3 Cache (MB)QPI speed (GT/s)DDR3 Clock (MHz)TDP (W)CoresThreadsTurbo-Boost
-series "Beckton"[]
Beckton or&Nehalem-EX&(EXpandable server market) is a Nehalem-based processor with up to eight cores and uses buffering inside the chipset to support up to 16 standard DDR3 DIMMS per CPU socket without requiring the use of FB-DIMMS.Unlike all previous Xeon MP processors, Nehalem-EX uses the new&&package, replacing the&&used in the previous models, up to Xeon&. The 75xx models have four QuickPath interfaces, so it can be used in up-to eight-socket configurations, while the 65xx models are only for up to two sockets. Designed by the Digital Enterprise Group (DEG) Santa Clara and Hudson Design Teams, Beckton is manufactured on the P1266 (45&nm) technology. Its launch in March 2010 coincided with that of its direct competitor, AMD's&&6xxx "Magny-Cours".
Most models limit the number of cores and QPI links as well as the L3 Cache size in order to get a broader range of products out of the single chip design.
ModelSpeed (GHz)L3 Cache (MB)QPI speed (GT/s)DDR3 Clock (MHz)TDP (W)CoresThreadsTurbo-Boost
E7-x8xx-series "Westmere-EX"[]
Westmere-EX is the follow-on to Beckton/Nehalem-EX and the first Intel Chip to have ten CPU cores. The microarchitecture is the same as in the six-core Gulftown/Westmere-EP processor, but it uses the&&package like Beckton to support up to eight sockets.
Starting with Westmere-EX, the naming scheme has changed once again, with "E7-xxxx" now signifying the high-end line of Xeon processors using a package that supports larger than two-CPU configurations, formerly the 7xxx series. Similarly, the 3xxx uniprocessor and 5xxx dual-processor series turned into E3-xxxx and E5-xxxx, respectively, for later processors.
Main article:&
E3-12xx-series "Sandy Bridge"[]
Main article:&
The Xeon E3-12xx line of processors, introduced in April 2011, uses the&&chips that are also the base for the Core i3/i5/i7-2xxx and Celeron/Pentium Gxxx products using the same&&socket, but with a different set of features disabled. Notably, the Xeon variants include support for&,&&and&that are not present on the consumer models, while only some Xeon E3 enable the integrated&&that is present on Sandy Bridge. Like its Xeon 3400-series predecessors, the Xeon E3 only supports operation with a single CPU socket and is targeted at entry-level workstations and servers. The CPUID of this processor is 0206A7h, the product code is 80623.
E3-12xx v2-series "Ivy Bridge"[]
Main article:&
Xeon E3-12xx v2&is a minor update of the Sandy Bridge based E3-12xx, using the 22 nm shrink, and providing slightly better performance while remaining backwards compatible. They were released in May 2012 and mirror the desktop Core i3/i5/i7-3xxx parts.
Main article:&
The Xeon E5-16xx processors follow the previous Xeon -series products as the high-end single-socket platform, using the&&package introduced with this processor. They share the Sandy Bridge-E platform with the single-socket Core i7-38xx and i7-39xx processors. The CPU chips have no integrated GPU but eight CPU cores, some of which are disabled in the entry-level products. The Xeon E5-26xx line has the same features but also enables multi-socket operation like the earlier Xeon 5000-series and Xeon 7000-series processors.
Main article:&
The&Xeon E5 v2&line was an update, released in September 2013 to replace the original Xeon E5 processors with a variant based on the Ivy Bridge shrink. The maximum number of CPU cores was raised to 12 per processor module and the total L3 cache was up to 30&MB.&The consumer version of the Xeon E5-16xx v2 processor is the&.
Main article:&
Introduced in May 2013, Xeon E3 v3 is the first Haswell microarchitecture based Xeon. It uses the new&&socket, which was introduced with the desktop Core i5/i7 Haswell processors and is not compatible with the LGA 1155 that was used in Xeon E3 and E3 v2. As before, the main difference between the desktop and server versions is added support for ECC memory in the Xeon branded parts. The main benefits of the new microarchitecture are better power efficiency and a faster GPU.
&based on Xeon processors that have been in the top ten of the&&fastest supercomputers in the world:
An Intel Xeon system at&&in&. Machine: SGI&&system with 3584 Quad-Core Clovertown processors at 3.0&GHz and&interconnect. This supercomputer was listed in third place in November 2007, ahead of the fastest&&and&-based supercomputers but behind two&-based&&systems built in Rochester, Minnesota.
A Chinese&A used a mixed Xeon-nVIDIA GPGPU configuration and reached first place on the TOP500 until being overtaken by the Japanese&
Xeon processor-based systems in the top 20 fastest systems by memory bandwidth as measured by STREAM benchmark:
An Intel Xeon virtual SMP system leveraging ScaleMP's Versatile SMP (vSMP) architecture with 128 cores and 1TB RAM.&This system aggregates 16 Stoakley platform (Seaburg chipset) systems with total of 32&&processors.
Systems with Xeon processors plus Xeon Phi coprocessors in the&&fastest supercomputers in the world:
The first listing which included a Xeon Phi coprocessors was number 150 on the June 2012 list. It was an Intel cluster named&Discovery,&using eight core Xeon E5-&GHz processors, Infiniband FDR, and Intel Xeon Phi coprocessors, for a total of 9800 cores.
Intel&, brand name for family of products using the&&architecture
From Wikipedia, the free encyclopedia
This list is&; you can help by&.
The&&microprocessor from&&is a CPU brand targeted at the server and workstation markets. It competes with AMD's&.
All models support:&
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL2RH&(B0)
SL344&(B0)
SL34H&(B1)
SL35N&(B1)
SL2NB&(B0)
SL345&(B0)
SL34J&(B1)
SL35P&(B1)
BX80523KX40
BX80523KX40
SL2XJ&(B1)
SL354&(B1)
SL36W&(B1)
SL33T&(B1)
October 1998
SL2XK&(B1)
SL33U&(B1)
January 1999
SL2XL&(B1)
SL33V&(B1)
January 1999
All models support:&,&
All models support quad-processor configurations
&size: 123&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL2XU&(B0)
SL3C9&(B0)
SL385&(C0)
SL3D9&(C0)
March 17, 1999
SL2XV&(B0)
SL3CA&(B0)
SL386&(C0)
SL3DA&(C0)
March 17, 1999
SL2XW&(B0)
SL3CB&(B0)
SL387&(C0)
SL3DB&(C0)
March 17, 1999
SL3FK&(C0)
SL3FR&(C0)
SL3LM&(C0)
SL3Y4&(C0)
SL3AJ&(C0)
April 7, 1999
SL3LN&(C0)
SL3TW&(C0)
SL3CE&(C0)
August 23, 1999
SL3CF&(C0)
SL3LP&(C0)
August 23, 1999
All models support:&,&
Only Xeon 700 and 900 are capable of quad processor configurations
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL3BJ&(A2)
SL3WM&(B0)
SL3BK&(A2)
SL3WN&(B0)
SL3SS&(A2)
October 1999
SL3BL&(A2)
SL3WP&(B0)
SL3DC&(A2)
SL3WQ&(B0)
SL3ST&(A2)
October 25, 1999
SL3U4, SL4GD, SL3U5, SL4GE&(A0)
SL49P, SL49Q, SL4RZ&(A1)
SL4XU&(B1)
SL5D4, SL4XV&(B0)
May 22, 2000
SL49R, SL49S, SL4R3&(A1)
SL3WZ, SL4GF, SL3X2, SL4GG&(A0)
SL4XW, SL5D5, SL4XX&(B0)
May 22, 2000
SL3SF&(A2)
SL3SG&(A2)
SL3SU&(A2)
SL3WR&(B0)
SL3WS&(B0)
SL4H6&(C0)
SL4H7&(C0)
October 25, 1999
SL3V2&(A2)
SL3V3&(A2)
SL3VU&(A2)
SL3WT&(B0)
SL3WU&(B0)
SL4H8&(C0)
SL4H9&(C0)
January 12, 2000
SL3WV&(B0)
SL3WW&(B0)
SL4PZ&(B0)
SL4HA&(C0)
SL4HB&(C0)
SL4U2&(C0)
March 13, 2000
SL4XY&(B0)
SL4XZ&(B0)
SL5D3&(B0)
March 21, 2001
SL3WX&(B0)
SL3WY&(B0)
SL4HC&(C0)
SL4HD&(C0)
SL4R9&(C0)
SL4U3&(C0)
SL4HE&(C0)
SL4HF&(C0)
SL4Q2&(C0)
August 22, 2000
All models support:&,&,&
Model NumbersSpec NumberFrequencyMultiplierVoltageSocketRelease DatePart Number(s)
SL4WX (C1)SL56G (C1)
May 21, 2001
SL4ZT (C1)SL5U6 (D0)SL4WY (C1)SL5TD (D0)
Socket 603
May 21, 2001
SL56N (C1)SL5U7 (D0)SL56H (C1)SL5TE (D0)
Socket 603
May 21, 2001
SL5U8 (D0)SL5TH (D0)
Socket 603
September 2001
All models support:&,&,&,&
Model NumbersSpec NumberFrequencyMultiplierVoltageSocketRelease DatePart Number(s)
Single Core
SL5Z8 (B0)SL622 (B0)SL6EL (C1)SL6JX (C1)SL6W3 (D1)SL6YS (D1)
February 25, 2002
SL5Z9 (B0)SL623 (B0)SL6EM (C1)SL6JY (C1)SL6W6 (D1)SL6YT (D1)
Socket 603
February 25, 2002
SL6NP (C1)SL6RQ (C1)SL6VK (D1)SL6YM (D1)SL72C (M0)SL73K (M0)
November 18, 2002
SL5ZA (B0)SL624 (B0)SL6EN (C1)SL6JZ (C1)SL6W7 (D1)SL6YU (D1)
Socket 603
February 25, 2002
SL65T (B0)SL687 (B0)SL6EP (C1)SL6K2 (C1)SL6W8 (D1)SL6YV (D1)
Socket 603
April 23, 2002
SL6GD (C1)SL6NQ (C1)SL6VL (D1)SL6YN (D1)SL72D (M0)SL73L (M0)
Socket 604
November 18, 2002
SL6EQ (C1)SL6K3 (C1)SL6W9 (D1)SL6YW (D1)
Socket 603
September 11, 2002
SL6GF (C1)SL6NR (C1)SL6VM (D1)SL6YP (D1)SL72E (M0)SL73M (M0)
Socket 604
November 18, 2002
SL6M7 (C1)SL6MS (C1)SL6WA (D1)SL6YX (D1)
Socket 603
September 11, 2002
SL6GG (C1)SL6NS (C1)SL6VN (D1)SL6YQ (D1)SL72F (M0)SL73N (M0)
Socket 604
November 18, 2002
SL6VW (C1)SL6X4 (C1)SL6WB (D1)SL6YY (D1)
Socket 603
March 10, 2003
SL6GH (C1)SL6RR (C1)SL6VP (D1)SL6YR (D1)
Socket 604
March 10, 2003
Single Core, low voltage
SL6XK (D1)
1.187&1.274 V
September 2003
SL6XL (D1)
1.179&1.27 V
Socket 604
September 2003
SL74T (D1)
1.17&1.265 V
Socket 604
September 2003
All models support:&,&,&,&
Model NumbersSpec NumberFrequencyL3-CacheMultiplierVoltageSocketRelease DatePart Number(s)
SL7D4 (M0)SL7DF (M0)
March 2003
SL7D5 (M0)SL7DG (M0)
Socket 604
February 2004
SL72G (M0)SL73P (M0)
Socket 604
July 14, 2003
SL72Y (M0)SL73Q (M0)
Socket 604
October 6, 2003
SL7AE (M0)SL7BW (M0)
Socket 604
February 2004
All models support:&,&,&,&,&,&
: D0, E0, G1
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
Single Core
SL7DV (D0)SL7HF (D0)SL7TB (E0)SL84B (E0)
1.287&1.4 V
June 28, 2004
SL7PD (E0)SL8KN (G1)
1.287&1.4 V
Socket 604
June 28, 2004
SL7DW (D0)SL7HG (D0)SL7TC (E0)
1.287&1.4 V
Socket 604
June 28, 2004
SL7PE (E0)SL8KP (G1)
1.287&1.4 V
Socket 604
June 28, 2004
SL7DX (D0)SL7HH (D0)SL7PF (E0)SL7TD (E0)SL8KQ (G1)
1.287&1.4 V
Socket 604
June 28, 2004
SL7DY (D0)SL7HJ (D0)SL7PG (E0)SL7TE (E0)SL8KR (G1)
1.287&1.4 V
Socket 604
June 28, 2004
SL7DZ (D0)SL7HK (D0)SL7PH (E0)SL7VF (E0)SL8KS (G1)
1.287&1.4 V
Socket 604
June 28, 2004
Single Core, low voltage
SL8RW (G0)
October 2004
All models support:&,&,&,&,&,&&(an&&implementation)&and&.
E processors do not support&.
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
Single Core
SL7ZG (N0)SL8ZR (N0)
1.25&1.388 V
September 26, 2005
SL8P7 (R0)
1.25&1.388 V
Socket 604
September 26, 2005
SL8ZQ (N0)
1.25&1.388 V
Socket 604
February 14, 2005
SL7ZF (N0)SL8P6 (R0)
Socket 604
February 14, 2005
SL7ZE (N0)SL8ZP (N0)
1.25&1.388 V
Socket 604
February 14, 2005
SL943 (N0)SL8P5 (R0)
Socket 604
February 14, 2005
SL7ZK (N0)SL7ZD (N0)
1.25&1.3875 V
Socket 604
February 14, 2005
SL8P4 (R0)
Socket 604
February 14, 2005
SL7ZC (N0)SL7ZJ (N0)
1.25&1.3875 V
Socket 604
February 14, 2005
SL8P3 (R0)
Socket 604
February 14, 2005
SL8ZJ (N0)SL7ZB (N0)
Socket 604
September 26, 2005
SL93Z (N0)SL8ZM (N0)SL8ZN (N0)SL8ZK (N0)SL8P2 (R0)
Socket 604
September 26, 2005
Single Core, medium voltage
SL8T3 (R0)
Socket 604
September 26, 2005
Single Core, low voltage
SL8SV (R0)
1.05&1.20 V
Socket 604
September 26, 2005
All models support:&,&,&,&,&,&,&&(an&&implementation)
Model NumbersSpec NumberFrequencyMultVoltageSocketRelease DatePart Number(s)Release Price ()
SL8MA (A0)
October 10, 2005
All models support:&,&,&,&,&,&,&&(an&&implementation),&
All models support dual-processor configurations
&size: 2 & 81&mm²
Demand Based Switching (Intel's Server&): Supported by: All except .
Model NumbersSpec NumberFrequencyMultVoltageSocketRelease DatePart Number(s)Release Price ()
SL96F (C1)
1.075&1.35 V
SL96E (C1)
2 & 2048 KiB
1.075&1.35 V
May 23, 2006
SL96D (C1)
2 & 2048 KiB
1.075&1.35 V
SL96C (C1)
2 & 2048 KiB
1.075&1.35 V
May 23, 2006
SL96A (C1)
2 & 2048 KiB
1.075&1.35 V
May 23, 2006
SL969 (C1)
2 & 2048 KiB
1.075&1.35 V
SL968 (C1)
2 & 2048 KiB
1.075&1.35 V
May 23, 2006
Dual Core, medium voltage
SL96B (C1)
1.075&1.35 V
May 23, 2006
All models support:&,&,&,&
Model NumbersSpec NumberFrequencyL3-CacheMultiplierVoltageSocketRelease DatePart Number(s)Release Price ()
SL5FZ (C0)SL5RV (C0)
March 12, 2002
SL5G2 (C0)SL5RW (C0)
Socket 603
March 12, 2002
SL5G8 (C0)SL5S4 (C0)
Socket 603
March 12, 2002
All models support:&,&,&,&
Model NumbersSpec NumberFrequencyL3-CacheMultiplierVoltageSocketRelease DatePart Number(s)Release Price ()
SL6GZ (A0)SL6KB (A0)
November 4, 2002
SL6H2 (A0)SL6KC (A0)
Socket 603
November 4, 2002
SL6YJ (B0)SL6Z6 (B0)
Socket 603
June 30, 2003
SL66Z (A0)SL6KD (A0)
Socket 603
November 4, 2002
SL7A5 (B0)
Socket 603
March 2, 2004
SL6Z2 (B0)SL6Z7 (B0)
Socket 603
June 30, 2003
SL79Z (B0)
Socket 603
March 2, 2004
SL6YL (B0)SL6Z8 (B0)
Socket 603
June 30, 2003
SL79V (B0)
Socket 603
March 2, 2004
All models support:&,&,&,&,&,&,&&(an&&implementation)
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
SL84U (A0)SL8UM (B0)
March 29, 2005
SL84W (A0)SL8UN (B0)
Socket 604
March 29, 2005
All models support:&,&,&,&,&,&,&&(an&&implementation)
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
SL8ED (C0)
1.25&1.4 V
March 29, 2005
SL8EW (C0)
1.25&1.4 V
Socket 604
March 29, 2005
SL8EY (C0)
1.25&1.4 V
Socket 604
March 29, 2005
All models support:&,&,&,&,&,&,&&(an&&implementation),&
Demand Based Switching (Intel's Server&): All except 7030.
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
SL8UA (A0)
December 2005
SL8UB (A0)
2 & 1024 KiB
Socket 604
December 2005
SL8UC (A0)
2 & 2048 KiB
Socket 604
December 2005
SL8UD (A0)
2 & 2048 KiB
Socket 604
December 2005
All models support:&,&,&,&,&,&,&&(an&&implementation),&
All models support quad-processor and octo-processor configurations
Demand Based Switching (Intel's Server&): Supported by: All except 7110M/N & 7120M/N.
&size: 435&mm²
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
SL9QA (B0)
1.1&1.35 V
August 27, 2006
SL9Q9 (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HF (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HC (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HE (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HB (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HD (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9HA (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
August 27, 2006
SL9YR (B0)
2 & 1024 KiB
1.1&1.35 V
Socket 604
All models support:&,&,&,&, Demand Based Switching (Intel's Server&) ,&&(an&&implementation),&
All models support dual-processor configurations
&size: 90.3&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
Dual Core, low voltage
SL98Q&(C0)
SL9HP&(D0)
March 14, 2006
SL8WT&(C0)
SL9HN&(D0)
March 14, 2006
SL9HM&(D0)
Dual Core, ultra low voltage
SL9HS&(D0)
March 14, 2006
All models support:&,&,&,&,&,&,&&(an&&implementation),&
All models support uni-processor configurations
&size: 111&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL9VT&(L2)
SLAC2&(L2)
0.85&1.5&V
January 21, 2007
SL9VS&(L2)
SLABZ&(L2)
0.85&1.5&V
January 21, 2007
All models support:&,&,&,&,&,&,&&(an&&implementation),&
All models support uni-processor configurations
&size: 143&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL9TW&(B2)
0.85&1.5&V
September 26, 2006
SL9TY&(B2)
0.85&1.5&V
September 26, 2006
SL9TZ&(B2)
SL9ZH&(B2)
SLACD&(B2)
0.85&1.5&V
September 26, 2006
SLAA9&(G0)
0.85&1.5&V
October 7, 2007
SL9U2&(B2)
SL9ZC&(B2)
SLACC&(B2)
0.85&1.5&V
September 26, 2006
SLAA3&(G0)
0.85&1.5&V
October 7, 2007
SLAA2&(G0)
0.85&1.5&V
October 7, 2007
All models support:&,&,&,&,&,&,&,&&(an&&implementation),&
All models support dual-processor configurations
&size: 143&mm²
For processors with G0 stepping Vmin&= 0.85 V
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL9RZ&(B2)
SLABR&(B2)
SLAGE&(G0)
June 26, 2006
SL9RY&(B2)
SLABQ&(B2)
SLAGD&(G0)
June 26, 2006
SL9RX&(B2)
SLABP&(B2)
SLAGC&(G0)
June 26, 2006
SL9RW&(B2)
SLABN&(B2)
SLAGB&(G0)
June 26, 2006
SL9RU&(B2)
SLABM&(B2)
SLAGA&(G0)
June 26, 2006
SL9RT&(B2)
SLABS&(B2)
SLAG9&(G0)
June 26, 2006
Dual Core, low voltage
SLAG7&(G0)
December 4, 2006
SL9XA&(B2)
SLAG6&(G0)
December 4, 2006
SLABJ&(B2)
SLAG5&(G0)
June 26, 2006
SL9RN&(B2)
SLAG3&(G0)
December 4, 2006
SL9RR&(B2)
SLABH&(B2)
SLAG4&(G0)
June 26, 2006
All models support:&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&,&&(an&&implementation),&
Models support only uni-processor configurations
&size: 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
Single Core, low voltage
SLBB2&(E0)
0.85&1.3625&V
February 27, 2008
SLBAX&(E0)
0.85&1.3625&V
September 8, 2008
All models support:&,&,&,&,&,&,&,&&(an&&implementation),&
All model support&
All models support only single-processor configurations
&size: 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLAPM&(C0)
SLB9C&(E0)
0.85&1.3625&V
January 8, 2008
SLB9D&(E0)
0.85&1.3625&V
August 10, 2008
Dual Core, low voltage
SLGP9&(E0)
0.85&1.3625&V
February 22, 2009
All models support:&,&,&,&,&,&,&,&&(an&&implementation),&
All model support&&except L5238, L5240.
E5205, L5238, L5240, X5260, X5270, X5272 support&Demand-Based Switching.
All models support dual-processor configurations
&size: 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLANG&(C0)
SLBAU&(E0)
0.85&1.35&V
November 11, 2007
SLANF&(C0)
SLBAT&(E0)
0.85&1.35&V
February 27, 2008
SLAND&(C0)
SLBAW&(E0)
0.85&1.35&V
February 27, 2008
SLANJ&(C0)
SLBAS&(E0)
0.85&1.35&V
November 11, 2007
SLBAQ&(E0)
0.85&1.35&V
September 8, 2008
SLANH&(C0)
SLBAR&(E0)
0.85&1.35&V
November 11, 2007
Dual Core, low voltage
SLBB3&(E0)
0.85&1.35&V
September 8, 2008
SLANM&(C0)
SLBAZ&(E0)
0.85&1.35&V
February 27, 2008
SLAS3&(C0)
SLBAY&(E0)
0.85&1.35&V
February 27, 2008
SLBAV&(E0)
0.85&1.35&V
September 8, 2008
All models support:&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&&implementation),&
All models support uni-processor configurations
&size: 2 & 143&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL9UQ&(B3)
SLACU&(G0)
0.85&1.5&V
January 7, 2007
SL9UP&(B3)
SLACT&(G0)
0.85&1.5&V
January 7, 2007
SLACS&(G0)
0.85&1.5&V
July 27, 2007
All models support:&,&,&,&,&,&, Enhanced Intel&&Technology (EIST), Enhanced Halt State (C1E),&,&&(an&implementation),&
All models support uni-processor configurations
&size: M1: 2 & 107&mm², R0: 2 & 81&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLAWF&(M1)
SLB69&(R0)
0.85&1.3625&V
January 7, 2008
SLB6C&(R0)
0.85&1.3625&V
August 10, 2008
All models support:&,&,&,&,&,&, Enhanced Intel&&Technology (EIST), Enhanced Halt State (C1E),&,&&(an&implementation),&
All models support uni-processor configurations
&size: 2 & 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLAN7&(C0)
SLAX2&(C1)
SLB8Y&(E0)
0.85&1.3625&V
January 7, 2008
SLAN5&(C0)
SLAWZ&(C1)
SLB8X&(E0)
0.85&1.3625&V
January 7, 2008
SLB8Z&(E0)
0.85&1.3625&V
August 10, 2008
SLGPG&(E0)
0.85&1.3625&V
February 22, 2009
Quad Core, low voltage
SLGPF&(E0)
0.85&1.3625&V
February 22, 2009
All models support:&,&,&,&,&,&, Enhanced Intel&&Technology (EIST), Enhanced Halt State (C1E),&,&&(an&implementation),&
All models support uni-processor configurations
&size: 2 & 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLASE&(C1)
SLBC5&(E0)
0.85&1.35&V
March 2008
SLASD&(C1)
SLBC4&(E0)
0.85&1.35&V
March 2008
SLASC&(C1)
SLBC3&(E0)
0.85&1.35&V
March 2008
All models support:&,&,&,&,&,&,&&(an&&implementation),&
&support all except E5310, E5335.
Intel Demand-Based Switching&support E5320, E5345, L5318, X5355, X5365.
All models support dual-processor configurations
&size: 2 & 143&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SL9XR&(B3)
SLACB&(B3)
SLAEM&(G0)
November 14, 2006
SL9MV&(B3)
SLAC8&(B3)
SLAEL&(G0)
November 14, 2006
Xeon E5330
SL9YK&(B3)
SLAC7&(B3)
SLAEK&(G0)
November 14, 2006
Xeon E5340
SL9YL&(B3)
SLAC5&(B3)
SLAEJ&(G0)
November 14, 2006
Xeon E5350, X5350
SL9YM&(B3)
SLAC4&(B3)
SLAEG&(G0)
November 14, 2006
SLAC3&(B3)
SLAED&(G0)
March 12, 2007
Quad Core, low voltage
SL9MT&(B3)
SLACA&(B3)
SLAEQ&(G0)
1.1&1.25&V
March 12, 2007
SLAJE&(G0)
0.9&1.25&V
August 13, 2007
SLA4Q&(B3)
SLAC9&(B3)
SLAEP&(G0)
1.1&1.25&V
March 12, 2007
SLAEN&(G0)
1.1&1.25&V
August 13, 2007
E5330, E5340 and E5350 is not listed on&&but it is mentioned on&. In August 2007, E5330 is widely available. In June 2007, E5340 Engineering Samples were available on eBay.
All models support:&,&,&,&,&,&,&,&&(an&&implementation),&, Demand-Based Switching except E5405, L5408;&except E5405
All models support dual-processor configurations
&size: 2 & 107&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLAP2&(C0)
SLBBP&(E0)
0.85&1.35&V
November 11, 2007
SLANW&(C0)
SLBBC&(E0)
0.85&1.35&V
SLANV&(C0)
SLBBL&(E0)
0.85&1.35&V
November 11, 2007
SLANU&(C0)
SLBBK&(E0)
0.85&1.35&V
November 11, 2007
SLANS&(C0)
SLBBJ&(E0)
0.85&1.35&V
November 11, 2007
SLANQ&(C0)
SLBBM&(E0)
0.85&1.35&V
November 11, 2007
SLASB&(C0)
SLBBE&(E0)
0.85&1.35&V
November 11, 2007
SLANP&(C0)
0.85&1.35&V
November 11, 2007
SLANT&(C0)
SLBBN&(E0)
0.85&1.35&V
November 11, 2007
SLBBF&(E0)
0.85&1.35&V
September 8, 2008
SLANR&(C0)
SLBBH&(E0)
0.85&1.35&V
November 11, 2007
SLASA&(C0)
SLBBB&(E0)
0.85&1.35&V
November 11, 2007
SLANZ&(C0)
SLBBG&(E0)
0.85&1.35&V
November 11, 2007
SLBBD&(E0)
0.85&1.35&V
September 8, 2008
Quad Core, low voltage
SLAP5&(C0)
SLBBT&(E0)
0.85&1.35&V
February 27, 2008
SLAP4&(C0)
SLBBS&(E0)
0.85&1.35&V
March 25, 2008
SLARP&(C0)
SLBBR&(E0)
0.85&1.35&V
March 25, 2008
SLBBQ&(E0)
0.85&1.35&V
September 8, 2008
All models support:&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&&implementation),&
All models support quad-processor configurations
&size: 2 & 143&mm²
ModelnumbersSpecnumberFrequencyRelease datePartnumber(s)Releaseprice ()
SLA6D&(G0)
1.2&1.325&V
September 6, 2007
SLA6C&(G0)
1.2&1.325&V
Socket 604
September 6, 2007
SLA6A&(G0)
1.2&1.35&V
September 6, 2007
SLA69&(G0)
1.2&1.35&V
Socket 604
September 6, 2007
SLA77&(G0)
1.2&1.35&V
Socket 604
September 6, 2007
SLA68&(G0)
1.2&1.35&V
Socket 604
September 6, 2007
SLA67&(G0)
1.2&1.35&V
Socket 604
September 6, 2007
Quad Core, low voltage
SLA6B&(G0)
1.10&1.25&V
September 6, 2007
All models support:&,&,&,&,&,&, Demand-Based Switching,&,&&(an&&implementation),&
E7440, E7450, X7460 support&.
All models support quad-processor configurations
Transistors: 1.9 billion
&size: 503&mm²
Model NumbersSpec NumberFrequencyRelease DatePart Number(s)Release Price ()
SLG9G (A1)
0.9&1.45 V
September 15, 2008
SLG9H (A1)
0.9&1.45 V
Socket 604
September 15, 2008
SLG9J (A1)
0.9&1.45 V
Socket 604
September 15, 2008
Quad Core, low voltage
SLG9L (A1)
0.9&1.45 V
September 15, 2008
SLG9K (A1)
0.9&1.45 V
September 15, 2008
Xeon E7458
SLG9N (A1)
0.9&1.45 V
Socket 604
September 15, 2008
SLG9P (A1)
0.9&1.45 V
Socket 604
September 15, 2008
Six Core, low voltage
SLG9M (A1)
0.9&1.45 V
September 15, 2008
Uni-processor only
L3406 supports&,&
All models support:&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&
Contains 45&nm "Ironlake"&.
&size: 81&mm² (CPU Component)
ModelnumbersSpecnumberFrequencyGPUfrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
Dual Core, low voltage
Xeon L3403
SLBT9&(K0)
SLBRX&(C2)
2 & DDR3-1066
0.65&1.40&V
October 2010
SLBT8&(K0)
SLBQQ&(C2)
2 & DDR3-1066
0.65&1.40&V
March 16, 2010
Uni-processor only
All models except X3430 support&
All models support:&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&
&size: 296&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBLJ&(B1)
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
SLBLF&(B1)
4 & 256 KB
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
SLBLD&(B1)
4 & 256 KB
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
SLBJK&(B1)
4 & 256 KB
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
SLBLH&(B1)
4 & 256 KB
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
SLBPT&(B1)
4 & 256 KB
2 & DDR3-1333
0.65&1.40&V
May 30, 2010
Quad Core, low voltage
SLBN3&(B1)
2 & DDR3-1333
0.65&1.40&V
September 8, 2009
Uni-processor only
Quad Core models support:&,&
All models support:&,&,&,&,&,&,&,&,&,&,&,&,&,&
&size: 263&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBGD&(D0)
1 & 4.8 GT/s&
3 & DDR3-1066
0.8&1.225&V
March 30, 2009
SLBGC&(D0)
2 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.8&1.225&V
March 30, 2009
SLBEW&(D0)
1 & 4.8 GT/s&
3 & DDR3-1066
0.8&1.375&V
March 30, 2009
SLBKR&(D0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.8&1.375&V
March 16, 2010
SLBEX&(D0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.8&1.375&V
March 30, 2009
SLBEY&(D0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.8&1.375&V
August 9, 2009
SLBEV&(D0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.8&1.225&V
November 1, 2009
SLBES&(D0)
4 & 256 KB
1 & 6.4 GT/s QPI
3 & DDR3-1333
0.8&1.375&V
March 30, 2009
SLBET&(D0)
4 & 256 KB
1 & 6.4 GT/s QPI
3 & DDR3-1333
0.8&1.375&V
August 9, 2009
Uni-processor only
LC3528 supports:&,&
All models support:&,&,&,&,&,&,&,&,&,&,&,&,&,&,&
&size: 263&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
Single Core, low voltage
SLBWH&(B0)
2 & DDR3-800
0.75&1.35&V
February 12, 2010
Dual Core, low voltage
SLBWG&(B0)
2 & 256 KB
2 & DDR3-800
0.75&1.35&V
February 12, 2010
SLBWJ&(B0)
4 & 256 KB
3 & DDR3-1066
0.75&1.35&V
February 12, 2010
Uniprocessor-only systems
All models support:&
All models support:&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&,&
&size: 240&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBVE&(B1)
1/1/1/1/2/2
1 & 4.8 GT/s
3 & DDR3-1066
0.8&1.375&V
August 29, 2010
SLBV2&(B1)
1/1/1/1/2/2
6 & 256 KB
1 & 6.4 GT/s QPI
3 & DDR3-1333
0.8&1.375&V
March 16, 2010
SLBW2&(B1)
1/1/1/1/2/2
6 & 256 KB
1 & 6.4 GT/s QPI
3 & DDR3-1333
0.8&1.375&V
February 14, 2011
All models support:&,&,&,&,&,&,&, Demand-Based Switching (Intel's Server&),&,&&(an&&implementation),,&,&,&
All models support:&,&&except E5502, E5503, E5504, E5506, L5506, E5507
All models support dual-processor configurations
&size: 263&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBEZ&(D0)
2 & 4.8 GT/s&
3 & DDR3-800
0.75&1.35&V
March 30, 2009
SLBKD&(D0)
2 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-800
0.75&1.35&V
March 16, 2010
Dual Core, low voltage
SLBGK&(D0)
2 & 5.86 GT/s&
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBF9&(D0)
2 & 4.8 GT/s&
3 & DDR3-800
0.75&1.35&V
March 30, 2009
SLBF8&(D0)
4 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-800
0.75&1.35&V
March 30, 2009
SLBKC&(D0)
4 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-800
0.75&1.35&V
March 16, 2010
SLBFD&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBF7&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBF6&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBF5&(D0)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 30, 2009
SLBF4&(D0)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 30, 2009
SLBF3&(D0)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 30, 2009
SLBF2&(D0)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 30, 2009
SLBGE&(D0)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
August 9, 2009
Quad Core, low voltage
SLBFH&(D0)
2 & 4.8 GT/s&
3 & DDR3-800
0.75&1.35&V
March 30, 2009
SLBFW&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBFA&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 30, 2009
SLBGF&(D0)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
August 9, 2009
All models support:&,&,&,&,&,&,&, Demand-Based Switching (Intel's Server&),&,&&(an&&implementation),,&,&,&,&
EC5549, LC5528, and LC5518 support:&,&
&size: 263&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBWL&(B0)
1 & 5.86 GT/s
3 & DDR3-1333
0.75&1.35&V
February 12, 2010
SLBWM&(B0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 12, 2010
SLBWP&(B0)
4 & 256 KB
1 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 12, 2010
Quad Core, low voltage
SLBWF&(B0)
1 & 4.8 GT/s&
3 & DDR3-1066
0.75&1.35&V
February 12, 2010
SLBWK&(B0)
4 & 256 KB
1 & 4.8 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 12, 2010
All models support:&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&&implementation),,&,&,&,&,&,&,&,&,&&except E5603, E5606, E5607, L5609
Dual-socket configurations supported
&size: 240&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
Xeon X5698
SLC32&(B1)
2 & 4.8 GT/s&
3 & DDR3-1066
0.75&1.35&V
SLC2F&(B1)
4 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 14, 2011
SLC2N&(B1)
4 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 14, 2011
SLBZ9&(B1)
4 & 256 KB
2 & 4.8 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 14, 2011
SLBV4&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBVB&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBVC&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBZ7&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
SLBVA&(B1)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBYK&(B1)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
SLBV9&(B1)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBVY&(B1)
4 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
Quad Core, low power
SLBVJ&(B1)
2 & 4.8 GT/s&
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBX3&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBVD&(B1)
4 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
March 16, 2010
SLBWZ&(B1)
1/1/1/1/2/2
6 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBZ8&(B1)
1/1/1/1/2/2
6 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
SLBV3&(B1)
2/2/2/2/3/3
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBV6&(B1)
2/2/2/2/3/3
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBV7&(B1)
2/2/2/2/3/3
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBYL&(B1)
2/2/2/2/3/3
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
Xeon X5679
SLC2E&(B1)
1/1/1/1/2/2
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1066
0.75&1.35&V
February 14, 2011
SLBV5&(B1)
1/1/1/1/2/2
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
SLBVX&(B1)
1/1/1/1/2/2
6 & 256 KB
2 & 6.4 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
Six Core, low power
SLBWY&(B1)
1/1/2/2/3/3
2 & 5.86 GT/s
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
Xeon L5639
SLBZJ&(B1)
2/2/3/3/4/4
6 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
SLBV8&(B1)
2/2/3/3/4/4
6 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
March 16, 2010
Xeon L5645
SLBVW&(B1)
2/2/3/3/4/4
6 & 256 KB
2 & 5.86 GT/s QPI
3 & DDR3-1333
0.75&1.35&V
February 14, 2011
All models support:&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&&implementation),,&,&,&,&,&,&,&,&&except X7542
65xx models support single- and dual-processor configurations, while 75xx models support up to 8-processor configurations
Transistors: 2.3 billion
&size: 684&mm²
Steppings: D0
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLBRL&(D0)
4 & 4.8 GT/s&
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRK&(D0)
4 & 256 KB
4 & 4.8 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRJ&(D0)
4 & 5.86 GT/s&
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRC&(D0)
6 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRG&(D0)
6 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRM&(D0)
6 & 256 KB
4 & 5.86 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
Six Core, low power
SLBRH&(D0)
4 & 5.86 GT/s&
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
Eight Core
SLBRB&(D0)
4 & 6.4 GT/s&
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRE&(D0)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
SLBRD&(D0)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
Eight Core, low power
SLBRF&(D0)
4 & 5.86 GT/s&
4 & DDR3-1333
0.675&1.35&V
March 30, 2010
Based on&.
All models support:&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&&implementation),,&,&,&,&,&,&&(except E7-8837),&,&, Smart Cache.
28xx models support single- and dual-processor configurations, 48xx models support up to four-processor configurations, 88xx models support up to eight-processor configurations.
Transistors: 2.6 billion
&size: 513&mm²
ModelnumbersSpecnumberFrequencyCoresI/O busRelease datePartnumber(s)Releaseprice ()
SLC3M&(A2)
4 & 4.8 GT/s&
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3L&(A2)
6 & 256 KB
4 & 4.8 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
Eight Core
SLC3R&(A2)
8 & 256 KB
4 & 5.86 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3J&(A2)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3G&(A2)
8 & 256 KB
4 & 5.86 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLT3Q&(A2)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3K&(A2)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3N&(A2)
8 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3W&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3H&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3U&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3V&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3S&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3T&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3D&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3F&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
SLC3E&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
Ten Core, low power
SLC3P&(A2)
10 & 256 KB
4 & 6.4 GT/s QPI
4 & DDR3-1333
0.6&1.35&V
April 3, 2011
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&,&.
All models support uni-processor configurations only.
&size:216&mm²
ModelnumbersSpecnumberCoresFrequencyI/O busRelease datePartnumber(s)Releaseprice ()
SR0NS&(D2)
SR0NU&(D2)
4 & 256 KB
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&&(except E3-1220, E3-1225),&,&, Smart Cache.
All models support uni-processor configurations only.
Intel HD Graphics P3000 uses drivers that are optimized and certified for professional applications, similar to&&&and&&&products.
&size: D2: 216&mm², Q0: 131&mm²
ModelnumbersSpecnumberCoresFrequencyGPUmodelGPUfrequencyI/O busRelease datePartnumber(s)Releaseprice ()
Dual Core, low power
SR070&(Q0)
April 3, 2011
SR00F&(D2)
4 & 256 KB
April 3, 2011
SR00G&(D2)
4 & 256 KB
HD Graphics P3000
850&1350 MHz
April 3, 2011
SR00H&(D2)
4 & 256 KB
April 3, 2011
SR00J&(D2)
4 & 256 KB
HD Graphics P3000
850&1350 MHz
April 3, 2011
SR00K&(D2)
4 & 256 KB
April 3, 2011
SR00L&(D2)
4 & 256 KB
HD Graphics P3000
850&1350 MHz
April 3, 2011
SR00N&(D2)
4 & 256 KB
April 3, 2011
SR00P&(D2)
4 & 256 KB
HD Graphics P3000
850&1350 MHz
April 3, 2011
SR00R&(D2)
4 & 256 KB
April 3, 2011
SR055&(D2)
4 & 256 KB
May 29, 2011
Quad Core, low power
SR00M&(D2)
4 & 256 KB
HD Graphics 2000
650&1250 MHz
April 3, 2011
Based on&&CPU.
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&,&,&, Smart Cache.
ModelnumbersSpecnumberCoresFrequencyI/O busRelease datePartnumber(s)Releaseprice ()
SR0RM&(M1)
May 14, 2012
SR0JW&(C2)
SR0M4&(C2)
6 & 256 KB
Based on&&microarchitecture.
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&,&,&(except E5-1603, E5-1607),&,&, Smart Cache.
ModelnumbersSpecnumberCoresFrequencyI/O busRelease datePartnumber(s)Releaseprice ()
standard power
SR0L9&(M1)
March 6, 2012
SR0L8&(M1)
4 & 256 KB
March 6, 2012
SR0LC&(M1)
4 & 256 KB
March 6, 2012
SR0HC&(C1)
SR0KZ&(C2)
3/3/4/5/6/6
6 & 256 KB
March 6, 2012
SR0H2&(C1)
SR0KN&(C2)
3/3/4/4/6/6
6 & 256 KB
March 6, 2012
$1080$1083
The primary difference between the E5-24xx and E5-26xx series is the different socket and second QPI interconnect on the E5-26xx.
Based on&&CPU.
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&,&,&&(except E5-2403, E5-2407),&,&, Smart Cache.
ModelnumbersSpecnumberCoresFrequencyI/O busRelease datePartnumber(s)Releaseprice ()
SR0LS&(M1)
May 14, 2012
SR0LR&(M1)
4 & 256 KB
6.4 GT/s QPI
May 14, 2012
Quad Core, low power
SR0M5&(M1)
4 & 256 KB
6.4 GT/s QPI
May 14, 2012
SR0LN&(C2)
3/3/4/4/5/5
6 & 256 KB
7.2 GT/s QPI
May 14, 2012
SR0LM&(C2)
3/3/4/4/5/5
6 & 256 KB
7.2 GT/s QPI
May 14, 2012
SR0LK&(C2)
3/3/4/4/5/5
6 & 256 KB
7.2 GT/s QPI
May 14, 2012
Six Core, low power
SR0JV&(C2)
SR0M3&(C2)
0/0/1/1/2/2
6 & 256 KB
7.2 GT/s QPI
May 14, 2012
SR0LL&(C2)
3/3/4/4/5/5
6 & 256 KB
7.2 GT/s QPI
May 14, 2012
Eight Core
SR0LJ&(C2)
5/5/6/6/7/7/8/8
8 & 256 KB
8.0 GT/s QPI
May 14, 2012
$1107$1112
SR0LG&(C2)
5/5/6/6/7/7/8/8
8 & 256 KB
8.0 GT/s QPI
May 14, 2012
$1440$1444
Eight Core, low power
SR0JU&(C2)
SR0M2&(C2)
0/0/1/1/2/2/3/3
8 & 256 KB
8.0 GT/s QPI
May 14, 2012
Xeon E5-2449L
SR0R1&(C2)
8 & 256 KB
8.0 GT/s QPI
May 14, 2012
SR0LH&(C2)
2/2/3/3/4/4/5/5
8 & 256 KB
8.0 GT/s QPI
May 14, 2012
Based on&&CPU.
All models support:&,&,&,&,&,&,&,&, Enhanced Intel&&Technology (EIST),&, XD bit (an&implementation),&,&,&,&,&,&,&&(except E5-2603, E5-2609),&,, Smart Cache.
ModelnumbersSpecnumberCoresFrequencyI/O busRelease datePartnumber(s)Releaseprice ()
SR0LE&(M1)
2 & 8.0 GT/s&
March 6, 2012
SR0LB&(M1)
4 & 256 KB
2 & 6.4 GT/s QPI
March 6, 2012
SR0LA&(M1)
4 & 256 KB
2 & 6.4 GT/s QPI
March 6, 2012
SR0L7&(M1)
4 & 256 KB
2 & 8.0 GT/s QPI
March 6, 2012
Quad Core, low power
Xeon E5-2618L
SR0M1&(M1)
4 & 256 KB
2 & 6.4 GT/s QPI
July 22, 2013
SR0KW&(C2)
SR0KW&(C1)
SR0KW&(C2)
3/3/4/4/5/5
6 & 256 KB
2 & 7.2 GT/s QPI
March 6, 2012
$406$406$410
SR0KV&(C2)
SR0H6&(C1)
SR0KV&(C2)
3/3/4/4/5/5
6 & 256 KB
2 & 7.2 GT/s QPI
March 6, 2012
$612$612$616
SR0KR&(C2)
SR0H5&(C1)
SR0KR&(C2)
3/3/4/4/5/5
6 & 256 KB
2 & 7.2 GT/s QPI
March 6, 2012
$885$885$889
SR0KP&(C2)
SR0H3&(C1)
3/3/3/4/5/6
6 & 256 KB
2 & 8.0 GT/s QPI
March 6, 2012
Six Core, low power
Xeon E5-2628L
SR0LY&(C2)
6 & 256 KB
2 & 7.2 GT/s QPI
July 22, 2013
SR0KM&(C2)
SR0H1&(C1)
3/3/4/4/5/5
6 & 256 KB
2 & 7.2 GT/s QPI
March 6, 2012
Eight Core
SR0KQ&(C2)
SR0H4&(C1)
SR0KQ&(C2)
4/4/5/5/5/7/8/8
8 & 256 KB
2 & 8.0 GT/s QPI
March 6, 2012
$1107$1107$1112
SR0LZ&(C2)
SR0HG&(C1)
0/0/1/1/2/2/3/3
8 & 256 KB
2 & 8.0 GT/s QPI
March 6, 2012
SR0KK&(C2)
SR0GZ&(C1)
SR0KK&(C2)
5/5/6/6/7/7/8/8
8 & 256 KB
2 & 8.0 GT/s QPI
March 6, 2012
$1329$1329$1333
SR0L1&(C2)
SR0HB&(}