B&O PLAY1643158
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规格与包装
商品名称：B&O PLAY1643158
商品编号：2117738
商品毛重：330.00g
商品产地：中国大陆
功能用途：音乐耳机，手机耳机，旅行降噪
耳机配件：其他
发声原理：动圈
连接类型：有线
热词：低音好
佩戴方式：入耳式
商品介绍加载中...
型号1643158
频响范围20Hz~16KHz
特性主动降噪
BeoPlay H3 ANC耳机 附Comply耳塞(M) 硅胶耳塞(XS, S, M, L)
飞机专用配接器
快速使用指南
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心中疑惑就问问买过此商品的同学吧~
iframe(src='///ns.html?id=GTM-T947SH', height='0', width='0', style='display: visibility:')& 产品参数对比
B&OBeoPlay H3和B&OBeoPlay H5和B&O BeoPlay H3 ANC有什么区别
参数仅为参考，产品以当地实际销售实物为准。
B&O BeoPlay H3
B&O BeoPlay H5
B&O BeoPlay H3 ANC
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暂无点评 8.4
10.8mm6.4mm
20-16000Hz20-20000Hz20-16000Hz
音乐播放时间
Micro USB接口
麦克风参数
耳机线设计
不锈钢，橡胶，聚合物铝，布，橡胶，聚合物不锈钢+橡胶+塑料
26*20*23mm39*28*23.5mm20*26*23mm
BeoPlay H3 耳机&×1
入耳配件 XS/S/M/L型号&×1
飞行适配器&×1
保护包&×1
使用指南&×1H5耳机&*1
USB充电器&*1
快速入门指南&*1BeoPlay H3 ANC耳机&×1
硅胶耳塞 (XS，S，M，L)& ×1
便携包&×1
USB充电线&×1
飞行适配器&×1
快速使用指南&×1
保修卡&×1
注意事项&×1
H5充电器&*1
硅胶耳塞&*2
H5线缆夹&*2
全国联保，享受三包服务全国联保，享受三包服务全国联保，享受三包服务01005 MF31 30PP_TRISTAR_ACC1TP12 1TP-P555%1/32WA8ROOM=TESTOUTROOM=SOC RNOSTUFF1.00KSELECTED -->BOARD_ID[4:0]FLOAT=LOW, 001 N71 00110 N66 PULLUP=HIGH MLB DEV MLB31 30PP_TRISTAR_ACC2TP13 1TP-P55ATRISTAR ACCESSORY ID ACCESSORY POWER801005 MF5%1/32WOUTROOM=SOC R1.00K 1.00K 1.00KSELECTED -->ROOM=TEST01005 MF5%1/32WTP14 1TP-P55A8OUTROOM=SOC RNOSTUFFBOOT_CONFIG[2:0]FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0 x2 MODE 011 NVME0 x2 TEST MODE 100 NVME0 x1 MODE 101 NVME0 x1 TEST MODE 110 SLOW SPI0 TEST MODE 111 FAST SPI0 TEST MODE01005 MF5%1/32WROOM=TEST8OUTROOM=SOC RNOSTUFF31 30TRISTAR_CON_DETECT_LTP15 1TP-P5501005 MF5%1/32WAROOM=SOC RROOM=TESTNOSTUFF8OUTBOOT_CONFIG2 BOOT_CONFIG1 BOOT_CONFIG01.00KA801005 MF5%1/32W 2 1.00K 1/32WPAGE TITLEOUTR0410 1NOSTUFFROOM=SOCASYSTEM:N71 SPECIFICDRAWING NUMBER SIZE01005 MF5%8OUTROOM=SOC R1.00KR01005 MF5%1/32WApple Inc.NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 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THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVEDTODO:UPDATE REF DES5 OF 49SHEETROOM=ASSEMBLY4 OF 5987654321 87654321MAUI - USB, JTAG, XTALD DVDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAXR060015 7 6VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAXPP1V210.00 20% 1/32W MF 01005PP1V2_PLLVOLTAGE=1.2V 1PP1V83 6 7 8 9 12 13 14 17 20 21 29 33C06000.1UFROOM=SOC1C06010.1UFROOM=SOC1C06020.01UFROOM=SOC1C06030.01UFROOM=SOC1C06120.1UFROOM=SOCROOM=SOC1KOHM-25%-0.2A PP1V8_XTALVOLTAGE=1.8V 1 1 2ROOM=SOCFL0610020120% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100510% 2 6.3V X5R 0100510% 2 6.3V X5R 0100520% 2 6.3V X5R-CERM 01005C06110.1UFROOM=SOC1C06102.2UFROOM=SOC20% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0201PP3V3_USBVDD12_UH1_HSIC0 AP21 VDD12_UH2_HSIC1 C15 VDD12_PLL_LPDP F22 U20 T19 VDD12_PLL_SOC W19 VDD12_PLL_CPU AF13 VDD18_USB AL21 VDD33_USB AN20 VDD18_XTAL AL34 NOTE:LPDP RECEIVES UNFILTERED 1.2V AS IT IS UNUSEDCKPLUS_WAIVE=PWRTERM2GND15120% 6.3V 2 X5R-CERM 01005ROOM=SOC0.1UFC0620VDD33_USB:3.14-3.46V @5mA MAXCCOMIT_TABLECRITICALU0600MAUI-2GB-25NM-DDR-HAN22 NC AN21 UH1_HSIC0_DATA UH1_HSIC0_STB UH2_HSIC1_DATA UH2_HSIC1_STB JTAG_SEL JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK COLD_RESET* CFSB TST_CLKOUT USB_REXT AP18 FCMSP SC58980B0B-A040 SYM 1 OF 14ROOM=SOCANALOGMUX_OUT AP24AP_TO_PMU_AMUX_OUTOUT16NCC16 NC D15P3MM-NSM SM 1PPPP0600NCROOM=SOCY32 AC32 NC AB31 NC AA32 NC AB32 AA31 AC31 H33 AR23USB_D_P AT20 USB_D_N AT19USB_AP_DATA_P USB_AP_DATA_NBI BI30 30P3MM-NSM SM 1PPPP0601ROOM=SOCUSB_VBUS AP19 USB_ID AR19 NCUSB_VBUS_DETECTIN1730 30BI INSWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_OWL_ACTIVE_READY AP_TO_PMU_TEST_CLKOUT AP_TO_NAND_RESET_L33 16 9 3IN IN OUTUSB_REXT130 27 16 9ROOM=SOCPP0610P3MM-NSM SM 1PP16R0640200ROOM=SOCB13OUTAN23S3E_RESET*1% 1/32W MF 2 01005BH32 AF6 AL22 AG25HOLD_RESET TESTMODE FUSE1_FSRC FUSE2_FSRCWDOG Y33AP_TO_PMU_WDOG_RESET XTAL_AP_24M_IN XTAL_AP_24M_OUTOUT16XI0 AK35 XO0 AL351R0650511KOMIT_TABLECRITICALROOM=SOC1% 1/32W MF 2 01005R065111.60X1.20MM-SMY06002 4ROOM=SOC0.00 20% 1/32W MF 0100524.000MHZ-30PPM-9.5PF-60OHM 1 3 SOC_24M_O1C065012PFROOM=SOC1 2C065112PF5% 16V CERM 01005ROOM=SOCROOM=SOC5% 2 16V CERM 01005AP_XTAL_GNDVOLTAGE=0.0VSHORT-10L-0.1MM-SM 1 2ROOM=SOCXW0650ASYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:JTAG,USB,XTALDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED6 OF 49SHEET5 OF 5987654321 87654321MAUI - PCIE INTERFACESVDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAXDXW0740 SHORT-10L-0.1MM-SM15 7 5XW TO ISOLATE C0442,3 FROM C0740,1.VDD085_PCIE:0.802-TBDV @TBDmA MAX PP1V2_XWVOLTAGE=1.2V 1PP1V2112PP_FIXED7 11 14DC07402.2UFROOM=SOC1C07411.0UFROOM=SOC1C07420.1UFROOM=SOCROOM=SOCC07430.1UFAK28 AK25 AL24 AL27 VDD12_PCIE_TXPLL AL26 VDD12_PCIE_REFBUF AJ26ROOM=SOC1C07520.1UFROOM=SOC1C07511.0UFROOM=SOC1C07502.2UFROOM=SOC1C07310.1UFROOM=SOC20% 2 6.3V X5R-CERM 01005PCIE_EXT_CAP29 AM30 AN30PCIE_EXT_C PCIE_RX0_P PCIE_RX0_NC070113 13120.1UF 0.1UFOMIT_TABLEIN INPCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_NROOM=SOC20% 6.3VX5R-CERM 01005C0702ROOM=SOCPCIE_NAND_TO_AP_RXD0_C_P PCIE_NAND_TO_AP_RXD0_C_NCRITICALVDD085_PCIEVDD12_PCIEAH28 AJ25 AL23 AJ29 AL29 AJ24 AK27 AJ2720% 2 6.3V X5R-CERM 020120% 2 6.3V X5R 0201-120% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R 0201-120% 2 6.3V X5R-CERM 0201120% 6.3V2U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 2 OF 14PCIE_REF_CLK0_P PCIE_REF_CLK0_NAN35 AP35PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_BB_REFCLK_P PCIE_AP_TO_BB_REFCLK_NOUT OUT13 13X5R-CERM 01005PCIE_REF_CLK1_P AN34 PCIE_REF_CLK1_N AP34 PCIE_REF_CLK2_P AM32 PCIE_REF_CLK2_N AN32 PCIE_REF_CLK3_P AM31 NC PCIE_REF_CLK3_N AN31 NCOUT OUT33 33C070313120% 6.3V20.1UF 0.1UFOUT OUTPCIE LINK 013PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_NROOM=SOCX5R-CERM 01005C0704ROOM=SOCPCIE_AP_TO_NAND_TXD0_C_P PCIE_AP_TO_NAND_TXD0_C_NAT32 AR32120% 6.3V2PCIE_TX0_P PCIE_TX0_NROOM=SOCOUT OUT33 33CX5R-CERM 01005PP1V81R0720100KROOM=SOC1R0721100KROOM=SOC1NOSTUFF3 5 7 8 9 12 13 14 17 20 21 29 33R0722100KROOM=SOC13 33 33CC070513 13120% 6.3V20.1UF 0.1UFIN INPCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_NROOM=SOCX5R-CERM 01005C0706ROOM=SOCPCIE_NAND_TO_AP_RXD1_C_P PCIE_NAND_TO_AP_RXD1_C_NAM28 AN28120% 6.3V2PCIE_RX1_P PCIE_RX1_N PCIE_CLKREQ0* PCIE_CLKREQ1* PCIE_CLKREQ2* PCIE_CLKREQ3* AT11 AP12 AR12 AT125% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 01005X5R-CERM 01005C070713 13120% 6.3V20.1UF 0.1UFPCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L PCIE_BB_BI_AP_CLKREQ_LBI BI BIOUT OUTPCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_NROOM=SOCX5R-CERM 01005C0708ROOM=SOCPCIE_AP_TO_NAND_TXD1_C_P PCIE_AP_TO_NAND_TXD1_C_NAT31 AR31120% 6.3V2PCIE_TX1_P PCIE_TX1_NNCNOTE:CLKREQ_L PULL-UP FOR BB IN RADIO_MLB_MIMO SECTIONX5R-CERM 01005C0709PCIE LINK 133 33120% 6.3V20.1UF 0.1UFIN INPCIE_WLAN_TO_AP_RXD_P PCIE_WLAN_TO_AP_RXD_NROOM=SOCX5R-CERM 01005C0710ROOM=SOCPCIE_WLAN_TO_AP_RXD_C_P PCIE_WLAN_TO_AP_RXD_C_NAM27 AN27120% 6.3V2PCIE_RX2_P PCIE_RX2_NX5R-CERM 01005PCIE_PERST0* PCIE_PERST1* PCIE_PERST2* PCIE_PERST3*AR10 AT10 AP11 AR11PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_BB_RESET_LOUT OUT OUT13 33 33NCC071133 33120% 6.3V20.1UF 0.1UFOUT OUTPCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_TXD_NROOM=SOCX5R-CERM 01005C0712ROOM=SOCPCIE_AP_TO_WLAN_TXD_C_P PCIE_AP_TO_WLAN_TXD_C_NAT28 AR281 PCIE_TX2_P PCIE_TX2_N PCIE_EXT_REF_CLK_P AR33 PCIE_EXT_REF_CLK_N AT33R0700100KROOM=SOC1R0701100KROOM=SOC1R0702100KROOM=SOC120% 6.3V2X5R-CERM 010055% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 01005PCIE LINK 2BC071533 33120.1UF 0.1UFIN INPCIE_BB_TO_AP_RXD_P PCIE_BB_TO_AP_RXD_NROOM=SOC20% 6.3VX5R-CERM 01005C0716ROOM=SOCPCIE_BB_TO_AP_RXD_C_P PCIE_BB_TO_AP_RXD_C_NAM26 AN2612PCIE_RX3_P PCIE_RX3_NPCIE_RX_TX_BYPASS_CLK_P AT29 PCIE_RX_TX_BYPASS_CLK_N AR29B20% 6.3VX5R-CERM 01005C071733 33120% 6.3V20.1UF 0.1UFOUT OUTPCIE_AP_TO_BB_TXD_P PCIE_AP_TO_BB_TXD_NROOM=SOCX5R-CERM 01005C0718ROOM=SOCPCIE_AP_TO_BB_TXD_C_P PCIE_AP_TO_BB_TXD_C_NAT26 AR26120% 6.3V2PCIE_TX3_P PCIE_TX3_NX5R-CERM 01005AM25 PCIE_RX4_P NC AN25 PCIE_RX4_N NCPCIE_RCAL_POMIT_TABLE1OMIT_TABLE1AR24 PCIE_TX4_P NC AT24 PCIE_TX4_N NCPCIE_RCAL_P AT30 PCIE_RCAL_N AR30R0730100ROOM=SOCC0730100PFROOM=SOC1% 1/32W MF 2 010055% 2 16V NP0-C0G 01005PCIE_RCAL_NASYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:PCIEDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED7 OF 49SHEET6 OF 5987654321 87654321MAUI - CAMERA & DISPLAY INTERFACESD D0.756-0.893V @11mA MAX14 11 61.62-1.98V @23mA MAXPP_FIXED1PP1V83 5 6 7 8 9 12 13 14 17 20 21 29 33C08140.1UFROOM=SOC1C08010.1UFE10 E13 E8 D13ROOM=SOC1 D10 E7 D8 E11 E14C08020.1UFROOM=SOC1C08150.1UFNOTE:VDD12_LPDP SHOULD BE POWERED EVEN WHEN LPDP IS NOT USEDROOM=SOC20% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 01005VDD085_MIPIVDD18_MIPI15 6 5PP1V2E23 E25 E27 F24 VDD12_LPDPPP1V813 5 6 7 8 9 12 13 14 17 20 21 29 33U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 3 OF 14R08041.00KROOM=SOC1R08051.00KROOM=SOC1R08061.00KROOM=SOC1R08071.00KROOM=SOC5% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 01005C21 21IN INMIPI_RCAM_TO_AP_DATA0_CONN_P MIPI_RCAM_TO_AP_DATA0_CONN_N MIPI_RCAM_TO_AP_DATA1_CONN_P MIPI_RCAM_TO_AP_DATA1_CONN_N MIPI_RCAM_TO_AP_DATA2_CONN_P MIPI_RCAM_TO_AP_DATA2_CONN_N MIPI_RCAM_TO_AP_DATA3_CONN_P MIPI_RCAM_TO_AP_DATA3_CONN_N MIPI_RCAM_TO_AP_CLK_CONN_P MIPI_RCAM_TO_AP_CLK_CONN_N RCAM_REXT MIPI_AP_TO_LCM_DATA0_P MIPI_AP_TO_LCM_DATA0_N MIPI_AP_TO_LCM_DATA1_P MIPI_AP_TO_LCM_DATA1_NNC NCB8 A8 A9 B9 A13 B13 B14 A14 A12 B12 D12 A3 B3 B4 A4 B6 A6 A7 B7 A5 B5 D9MIPI0C_DATA0_P MIPI0C_DATA0_N MIPI0C_DATA1_P MIPI0C_DATA1_N MIPI0C_DATA2_P MIPI0C_DATA2_N MIPI0C_DATA3_P MIPI0C_DATA3_N MIPI0C_CLK_P MIPI0C_CLK_N MIPI0C_REXT MIPID_DATA0_P MIPID_DATA0_N MIPID_DATA1_P MIPID_DATA1_N MIPID_DATA2_P MIPID_DATA2_N MIPID_DATA3_P MIPID_DATA3_N MIPID_CLK_P MIPID_CLK_N MIPID_REXTCRITICALROOM=SOCISP_I2C0_SCL G31 ISP_I2C0_SDA G32 ISP_I2C1_SCL F35 ISP_I2C1_SDA G34I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDAOUT BI21 22 21 22CU0600MAUI-2GB-25NM-DDR-HA29 LPDP_AUX_P NC B29 LPDP_AUX_N NC A33 LPDP_TX0_P NC B33 LPDP_TX0_N NC A32 LPDP_TX1_P NC B32 LPDP_TX1_N NC FCMSP SC58980B0B-A040 SYM 4 OF 1421 21IN INOUT BI20 2021 21IN INR0808SENSOR0_CLK D33 SENSOR0_RST D32 SENSOR1_CLK F33 SENSOR1_RST E3421 21IN INAP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L1 1% MFOUT2133.2 201005CRITICALROOM=SOC1/32WAP_TO_RCAM_CLKOUT21R08091 1% MFROOM=SOC33.2 2010051/32WAP_TO_FCAM_CLKOUT2021 21IN INOUT20ROOM=SOCA31 LPDP_TX2_P NC B31 LPDP_TX2_N NC A30 LPDP_TX3_P NC B30 LPDP_TX3_N NC29 29OUT OUTSENSOR0_ISTRB D34 SENSOR0_XSHUTDOWN F32 SENSOR1_ISTRB C35 SENSOR1_XSHUTDOWN C34NC NCAP_TO_STOCKHOLM_DWLD_REQUEST AP_TO_MUON_BL_STROBE_EN FCAM_REXT MIPI_FCAM_TO_AP_DATA0_P MIPI_FCAM_TO_AP_DATA0_N MIPI_FCAM_TO_AP_DATA1_P MIPI_FCAM_TO_AP_DATA1_N MIPI_FCAM_TO_AP_CLK_P MIPI_FCAM_TO_AP_CLK_NOUT33NC27D24 D25 AL4 H35LPDP_CAL_DRV_OUT LPDP_CAL_VSS_EXT EDP_HPD DP_WAKEUP29 29OUTNC NC NCOUT OUTMIPICSI_MUXSEL G35 NC MIPI1C_REXT D14 MIPI1C_DATA0_P B17 MIPI1C_DATA0_N A17 MIPI1C_DATA1_P B19 MIPI1C_DATA1_N A19 MIPI1C_CLK_P A18 MIPI1C_CLK_N B18IN IN20 20B29 29NC NCOUT OUTIN IN20 20BMIPI_AP_TO_LCM_CLK_P MIPI_AP_TO_LCM_CLK_N LCM_REXTIN IN20 20R08014.02KROOM=SOC1R08024.02KROOM=SOC11R08034.02KROOM=SOC1% 1/32W MF 01005 21% 1/32W MF 01005 21% 1/32W MF 2 01005ASYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:CAMERA & DISPLAYDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED8 OF 49SHEET7 OF 5987654321 87654321MAUI - GPIO & SERIAL INTERFACESPP1V83 5 6 7 8 9 12 13 14 17 20 21 29 33R0 R0 R0DR092024 261.00K2.2KROOM=SOC1% 1/32W MF 01005 2ROOM=SOC5% 1/32W MF 01005 22.2KROOM=SOC5% 1/32W MF 01005 22.2KROOM=SOC5% 1/32W MF 01005 21.33K1.33K1% 1/32W MF 01005 2ROOM=SOC1% 1/32W MF 01005 2ROOM=SOCDI2C0_AP_SCL I2C0_AP_SDA I2C1_AP_SCL I2C1_AP_SDA I2C2_AP_SCL I2C2_AP_SDAOUT OUT OUT31 31 33 32 16 33 32 16 25 25 25 33 33 33 22 28 29 16 33 33 3OUT OUT IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT INC3 26 33 29 9 26 33 26 33 3 33 3 33 3 3 3 24 16 33 13 29 3 3 3 3 33 33 33 32 16 8 33 28IN OUT IN IN OUT OUT IN IN IN OUT IN IN IN OUT OUT IN IN IN IN IN OUT IN IN OUT OUTAP_TO_HP_HS3_CTRL AP_TO_HP_HS4_CTRL BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L SPEAKERAMP_TO_AP_INT_L AP_TO_SPEAKERAMP_STAYIN_ALIVE AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L AP_TO_BB_PCIE_DEV_WAKE AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3 NC_AP_TO_STOCKHOLM_SIM_SEL BOOT_CONFIG0 AP_TO_ARC_RESET_L LCM_TO_OWL_BSYNC ARC_TO_AP_INT_L (AP TO BB) BB_TO_AP_GPS_TIME_MARK AP_TO_ARC_STAYIN_ALIVE BB_TO_AP_RESET_DETECT_L BOOT_CONFIG1 FORCE_DFU DFU_STATUS BOOT_CONFIG2 BOARD_ID4 CODEC_TO_AP_PMU_INT_L AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_BB_COREDUMP BB_IPC_GPIO BUTTON_RINGER_A AP_TO_BB_MESA_UP_L MAMBA_EXT_LDO_EN25I2S_AP_TO_CODEC_MCLK I2S_AP_TO_ARC_MCLK I2S_AP_TO_SPEAKERAMP_MCLK133.2 21% 1/32W MF 0100524 9 24 9 24 9 24OUT OUT IN OUTC1 D2 D1 F1 E2 F3 F2 H3 G3 J1 H4 K1 J3 K2 J4 L2 K3 L3 N1 AH2 AH3 AH4 AJ1 AJ2 AJ3 AJ4 AK1 AP3 AN4 AP4 AP5 AR2 AR3 AR4 AP6 AT3 AT4 AR6 AP7 AT5 AP8 AP9 AP10GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 5 OF 141ROOM=SOCR092133.2 21% 1/32W MF 01005ROOM=SOCI2S_AP_TO_CODEC_MCLK_R I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT I2S_AP_TO_ARC_MCLK_R I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT I2S_AP_TO_SPEAKERAMP_MCLK_R I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT ALS_TO_AP_INT_L I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT TRISTAR_TO_AP_INT I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUTP34 R34 N34 N35 M33 M4 M3 P1 N3 L4 U32 V33 U33 T33 V34 AM3 AM4 AN2 AP1 AN1 R32 R31 V32 P31 P32I2S0_MCK I2S0_BCLK I2S0_LRCK I2S0_DIN I2S0_DOUT I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUT I2S4_MCK I2S4_BCLK I2S4_LRCK I2S4_DIN I2S4_DOUTU0600FCMSP SC58980B0B-A040I2C0_SCL E31 I2C0_SDA D35 I2C1_SCL AH1 I2C1_SDA AG4 I2C2_SCL L31 I2C2_SDA M32OUT BI8 16 27 33 8 16 27 33OUT BI8 17 25 26 30 33 8 17 25 26 30 33SYM 6 OF 14MAUI-2GB-25NM-DDR-HCRITICALROOM=SOCOUT BI8 20 29 8 20 2933 33 33 33CRITICALROOM=SOCTMR32_PWM0 AE1 NC TMR32_PWM1 AF2 NC TMR32_PWM2 AF3 NC UART0_RXD AE3 UART0_TXD AE4 UART1_CTS* UART1_RTS* UART1_RXD UART1_TXD UART2_CTS* UART2_RTS* UART2_RXD UART2_TXD UART3_CTS* UART3_RTS* UART3_RXD UART3_TXD UART4_CTS* UART4_RTS* UART4_RXD UART4_TXD K31 K32 L33 L32OUT OUT IN OUTPP1V83 5 6 7 8 9 12 13 14 17 20 21 29 33OMIT_TABLER0922IN OUT30 33 30 33UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD133.2 21% 1/32W MF 01005R090612.2KSEP_SPI0_SCLK W3 NC SEP_SPI0_MISO AA4 NC SEP_SPI0_MOSI U2 NCROOM=SOCR090712.2KROOM=SOC26 25 24 26 25 24 26 25 24 26 25 24OUT OUT IN OUT5% 1/32W MF 01005 25% 1/32W MF 01005 2IN OUT IN OUT33 33 33 33ROOM=SOC20 33IN OUT OUT IN OUTSEP_I2C_SCL V3 SEP_I2C_SDA Y4I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDAOUT BI8 8AT23 NC AR20 CAM_EXT_LDO_EN AP23 NC AP2233OUT2133 33NCSEP_GPIO0 Y3 NC SEP_GPIO1 AB4 NCCPP1V8_ALWAYS PP1V88 12 15 17N4 P3 R3 R2 J33 J34 J35 K33UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD SWI_AP_BI_TIGRIS30 16IN OUT OUT IN OUTIN OUT IN OUT33 33 33 3324 24 24 243 5 6 7 8 9 12 13 14 17 20 21 29 33IN OUT IN OUT33 33 33 33 3 3 3R09411IN IN INBOARD_ID2 BOARD_ID1 BOARD_ID0NCUART5_RTXD T32BI9 17AD4 AC3 AB2 AD3 P33 V35 N32 M31 E33 E35 F34 F31 AA2 Y2 AA3 AC4SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSIN SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN SOCHOT0 AM1ROOM=SOC5% 1/32W MF 01005 210KR09101ROOM=SOCNOSTUFF15% 1/32W MF 01005 210KR090910KROOM=SOC5% 1/32W MF 2 01005ROOM=SOCR0940PMU_TO_AP_SOCHOT0_R_L1 0% MF24IN OUT OUT OUTROOM=SOCUART6_RXD AF1 UART6_TXD AE2UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXDIN OUT30 30P2MM-NSMSMPPPP09061ROOM=SOC24 24 24SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK SPI_AP_TO_CODEC_CS_L SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT0.00 201005PMU_TO_AP_SOCHOT0_L AP_TO_PMU_SOCHOT1_L1/32WIN16SOCHOT1 AM2OUT16UART7_RXD J31 UART7_TXD J32 NCR09602929 29IN OUTOUTSPI_AP_TO_TOUCH_SCLK1 010050.00 20%1/32W MF29OUT IN OUTCPU_ACTIVE_STATUS H31 CLK32K_OUT H34NCB28ROOM=SOCR0930OUT28 28SPI_AP_TO_MESA_SCLK1 010050.00 20%AP_TO_TOUCH_CLK32K_RESET_L AP_TO_NAND_SYS_CLK_ROUT29BOUT131/32W MF28INNAND_SYS_CLK AM24R094510.00 20% 1/32W MF 01005AP_TO_NAND_SYS_CLKPP1V813 5 6 7 8 9 12 13 14 17 20 21 29 33ANALOG_PROXR0911ROOM=SOC5% 1/32W MF 2 010051.00KPROX_SELECTPIN J31 (UART7_RXD) SHOULD BE BRIEFLY SWITCHED TO PD TO CHECK STATE. STUFF R0911 FOR ANALOG PROX. NOSTUFF R0911 FOR DOPPLER PROX.ROOM=SOCANTI-ROLLBACK EEPROM128kbit APN:335S094621 20 17 14 13 12 9 8 7 6 5 3 33 29BUTTON PULL-UP RESISTORSDEFAULT_RESISTOR_191000OHM_2_11I2C PROBE POINTS12 14 15 16 24 27 30 31 33 33 27 16 8 33 27 16 8PP1V8_SDRAM100KPP1V81R0950191KROOM=SOC1R0951ROOM=SOCI2C0_AP_SCL I2C0_AP_SDAP3MM-NSM SM 1PP PP SMROOM=SOC1C09001.0UFROOM=SOCA1CRITICALROOM=SOCPP0900 PP0901A20% 2 6.3V X5R 0201-1VCCB1M34128-FCS6_P/TSCL WLCSP VSS SDAU090033 28 16 9 33 32 16 8BUTTON_MENU_KEY_L BUTTON_RINGER_A1% 1/32W MF 2 010055% 1/32W MF 2 01005P3MM-NSMROOM=SOC ROOM=SOCPP PP SMA2I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL33 30 26 25 17 8BI IN88PP1V8_ALWAYS18 12 15 1733 30 26 25 17 8I2C1_AP_SCL I2C1_AP_SDAP3MM-NSM SM 1 1PP0902 PP0903SYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:SERIAL & GPIODRAWING NUMBER SIZER0952220KROOM=SOC29 20 8 29 20 8P3MM-NSMROOM=SOC ROOM=SOCPP PP SMB233 32 16 9BUTTON_HOLD_KEY_L5% 1/32W MF 2 01005Apple Inc.R051-1902REVISIONDI2C2_AP_SCL I2C2_AP_SDAP3MM-NSM SM 1 1A.0.0BRANCH PAGEPP0904 PP0905NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVEDP3MM-NSMROOM=SOC9 OF 49SHEET8 OF 598765432.1 87654321MAUI - OWLDPOWER STATE CONTROL PROBE POINTSROOM=SOC30 27 16 9 5PMU_TO_OWL_ACTIVE_READY PMU_TO_OWL_SLEEP1_READYP3MM-NSM SM 1PPPP1021 PP1023ROOM=SOC16 11 9P3MM-NSM SM 1PPDU0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 7 OF 14 OMIT_TABLE16OUT IN OUT IN OUT IN OUT IN OUT IN9C16 11 9OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INTDISCRETE_ACCEL_TO_OWL_INT2AD30 AB33 AF35 AH32 AG32 AG31 AG30 AF33 AE34 AF34 AF31 AF32 AH31 AH33 AK31 AK32 AL33 AJ32 AK33 AH30 AJ31 AJ34 AJ33 AD34 AA34 AE32 NC AE31OWL_DDR_REQ OWL_DDR_RESET* OWL_FUNC_0 OWL_FUNC_1 OWL_FUNC_2 OWL_FUNC_3 OWL_FUNC_4 OWL_FUNC_5 OWL_FUNC_6 OWL_FUNC_7 OWL_FUNC_8 OWL_FUNC_9 OWL_I2CM_SCL OWL_I2CM_SDA OWL_SPI_MISO OWL_SPI_MOSI OWL_SPI_SCLK OWL_UART0_RXD OWL_UART0_TXD OWL_UART1_RXD OWL_UART1_TXD OWL_UART2_RXD OWL_UART2_TXD OWL_I2S_BCLK OWL_I2S_DIN OWL_I2S_MCK OWL_I2S_LRCKCFSB_AOP W33 AWAKE_REQ AA33 AWAKE_RESET* AD32 PMGR_MISO PMGR_MOSI PMGR_SCLK0 PMGR_SSCLK1 AL2 AL1 AK4 AL3PMU_TO_SYSTEM_COLD_RESET_L OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY DWI_PMU_TO_PMGR_MISO DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_BACKLIGHT_SCLK PMU_TO_OWL_CLK32K SWD_AP_PERIPHERAL_SWCLK SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO BUTTON_HOLD_KEY_LNCIN OUT IN IN3 5 16 3316 5 9 16 27 3019 19 19 19 19 19 19 33 29 8CRITICALROOM=SOCC1SMPPPP1002P2MM-NSM16 271619IN IN OUT IN OUT OUT IN OUT OUT OUT IN OUT OUT INACCEL_GYRO_TO_OWL_INT1 SPI_OWL_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_OWL_INT2 SPI_OWL_TO_PHOSPHOROUS_CS_L LCM_TO_OWL_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI PHOSPHORUS_TO_OWL_IRQSPI_OWL_TO_DISCRETE_ACCEL_CS_L DISCRETE_ACCEL_TO_OWL_INT1OUT OUT OUT IN OUT16 27PP1V8NOSTUFF 13 5 6 7 8 12 13 14 17 20 21 29 33R10021.00KROOM=SOCRT_CLK32768 AD31 OWL_SWD_TCK_OUT OWL_SWD_TMS0 OWL_SWD_TMS1 SWD_TMS2 SWD_TMS3 AE33 AD35 NC AC33 U31 T311613 335% 1/32W MF 2 01005BI3319 19BI13NCIN8 16 32 3319 19 19SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A TOUCH_TO_OWL_ACCEL_DATA_REQUEST UART_OWL_TO_TOUCH_TXD I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_OWL_TO_CODEC_XSP_LRCLKHOLD_KEY* U3 SKEY* W4 MENU_KEY* V4BUTTON_MENU_KEY_L33 33IN8 16 28 3333 3329 2924 8B24 8B24 8OUTOWL SYSTEM SHUTDOWN OPTIONNOSTUFFR10201 2 1/32W MF 5% 01005 ROOM=SOC910SWI_AP_BI_TIGRISBI8 17OWL_TO_PMU_SHDN_BI_TIGRIS_SWIANOSTUFFR10211 2 1/32W MF 5% 01005 ROOM=SOC10SYNC_MASTER=N/AOWL_TO_PMU_SHDNSYNC_DATE=N/AAOUT16PAGE TITLESOC:OWLDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED10 OF 49SHEET9 OF 5987654321 8765432PP_SOC11410.825V @4.7A MAX 0.725V @TBDA MAXMAUI - CPU, GPU & SOC RAILS14 10PP_GPU0.8V @10.5A MAX1C110010UFROOM=SOC1C110110UFROOM=SOC1DTPMMSM PPC11032.2UFROOM=SOC1C11042.2UFROOM=SOC1C11052.2UFROOM=SOC20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-9SHORT-10L-0.1MM-SM 1 2 BUCK1_PP_GPU_FBROOM=SOCXW111020% 6.3V 2 X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201OUT141PP_GPU10 14ROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCC11064.3UF1 20% 4V CERM 0402 3C11077.5UF20% 4V CERM 0402C11084.3UF1 20% 4V CERM 0402 3C11097.5UF20% 4V CERM 0402C11104.3UF1 20% 4V CERM 0402 3C11117.5UF20% 4V CERM 04021 2 431 2 431 2 432 42 42 4ROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCC11121UF1 20% 4V CERM 0402 3C11131UF1 20% 4V CERM 0402 3C11141UF1 20% 4V CERM 0402 3C111520% 4V CERM
2 4C11160.47UF1 20% 6.3V CERM 0402 3C11170.47UF1 20% 6.3V CERM 0402 31UF2 42 42 42 42 4C14 10PP_CPU0.625V @TBDA MAX 0.9V @10.5A MAX 1.0V @12.5A MAX1C112010UFROOM=SOC1C112110UFROOM=SOC1C11222.2UFROOM=SOC1C11232.2UFROOM=SOC1C11242.2UFROOM=SOC1C11252.2UFROOM=SOC20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201TPMMSM PP1PP_CPU10 14ROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCC11267.5UF20% 4V CERM 0402C11277.5UF20% 4V CERM 0402C11284.3UF1 20% 4V CERM 0402 3C11297.5UF20% 4V CERM 0402C11304.3UF1 20% 4V CERM 0402 3C11314.3UF1 20% 4V CERM 0402 31 2 431 2 431 2 432 42 42 4AA7 AA9 AA11 AB6 AB10 AB12 AC13 AD6 AD8 AD10 AD12 AE7 AE9 AE11 AE13 AF8 AF10 AF12 AH6 AH8 AH10 AH12 AJ5 AJ7 AJ9 AJ11 AJ13 AK6 AK10 AL7 AL9 AL11 AM6 AM8 AM10 AN7 AN11 AL13 Y8 Y10 Y12 AM12U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 8 OF 14CRITICALROOM=SOCOMIT_TABLEVDD_CPUVDD_GPUG15 W13 T12 M6 U9 V12 W9 M12 M18 N15 N21 N9 F10 H14 H16 H20 H22 H6 H8 J11 J13 J17 J19 J23 J7 K10 K14 K16 K20 K22 K6 K8 L11 L13 L15 L17 L19 L21 M24 L7 L9 F8 M8 N11 N13 N17 N19 P10 G11 P12 P14 P16 P20 R15 R19 G13 R9 T10 T14 T16 U11 V14 V16 G7 R23 G9 H10 T24 P22 W17 N23 G17 G21 T18 T20BROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCC11324.3UF1 20% 4V CERM 0402 3C11337.5UF20% 4V CERM 0402C11341UF1 20% 4V CERM 0402 3C113520% 4V CERM
2 4C11361UF1 20% 4V CERM 0402 3C113720% 4V CERM
2 41UF1UF1 2 432 42 42 4ROOM=SOCROOM=SOCROOM=SOCROOM=SOCC11380.47UF1 20% 6.3V CERM 0402 3C11390.47UF1 20% 6.3V CERM 0402 3C11400.47UF1 20% 6.3V CERM 0402 3C11410.47UF1 20% 6.3V CERM 0402 32 42 42 42 414OUTBUCK0_PP_CPU_FBSHORT-10L-0.1MM-SM 2 1ROOM=SOCXW1100AA17 AA19 AA23 AB14 AB16 AB20 AB22 AB24 AB26 AC17 AC19 AC23 AD16 AD20 AD22 AD24 AD26 AE5 AE15 AE17 AE19 AE23 AF14 AF16 AF20 AF22 AF24 AF26 AG17 AG19 AG23 AH16 AH20 AH22 AH24 AH26 AJ15 AJ17 AJ19 AJ23 AK14 J29 G23 AK22 F6 F14 AL15 AM5 G25 G27 H24 H26 H28 J27 K24 K26 K28 L27 L23 M26 M28 AL19 N7 N27 P24 P26 P28 R17 R27 R29 T22 T26 T7 T28 U17 V8 V20 V22 V24 V26 W7 W11 Y28 AJ20 AK21U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 9 OF 14CRITICALROOM=SOCVDD_SOCOMIT_TABLEW23 Y14 Y16 Y20 Y22 Y24 Y26 G29 AA27 F17 F20 L29 N29 V28C115010UFROOM=SOC1C115110UF20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-9ROOM=SOCSHORT-10L-0.1MM-SM 1 2 BUCK2_PP_SOC_FBROOM=SOCXW1120OUT14ROOM=SOCROOM=SOCROOM=SOCROOM=SOCROOM=SOCDC11534.3UF1 20% 4V CERM 0402 3C11541UF1 20% 4V CERM 0402 3C11551UF1 20% 4V CERM 0402 3C11560.47UF1 20% 6.3V CERM 0402 3C11570.47UF1 20% 6.3V CERM 0402 32 42 42 42 42 4VDD_SOCVSSVDD_SOC_SENSE VSS_SOC_SENSEAPP1100 PP1101P2MM-NSM SM 1PPROOM=SOCAP_CPU_SENSE_P AP_CPU_SENSE_NY6 VDD_CPU_SENSE Y7 VSS_CPU_SENSEVDD_GPU_SENSE G20 VSS_GPU_SENSE H19L22 L24 L26 L28 M1 M5 M7 M9 M11 M13 M17 M21 M23 M25 M27 M29 M35 N6 N10 N12 N14 N16 N18 G19 N22 N24 N26 N28 N30 N33 P9 P11 P13 P15 P17 P19 P21 P23 P25 P27 P29 P35 R4 R6 R8 R10 R12 R14 M19 R18 R20 R22 R24 R26 R28 R30 T1 T2 R33 T9 T11 T13 T15 T17 P7 T23 T25 T27 T30 T35 U6 U10 U12CBSYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:POWER (1/3)DRAWING NUMBER SIZEP2MM-NSM SM 1PPApple Inc.R051-1902REVISIONDROOM=SOCPP1102NOTE:AP_GPU_SENSE_P PROBE LOCATION @ R2205.2P2MM-NSM SM 1PPAP_GPU_SENSE_N AP_GPU_SENSE_PAP_SOC_SENSE_NP2MM-NSM SM 1PPA.0.0BRANCH PAGEPP1104 PP1105NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVEDROOM=SOCROOM=SOC16INAP_SOC_SENSE_PP2MM-NSM SM 1PP11 OF 49SHEETROOM=SOC10 OF 5987654321 87654321MAUI - POWER SUPPLIESDDR IMPEDANCE CONTROLD14 111.06 - 1.17V @635mA MAX INTERNALLY SUPPLIES VDDQ14 11PP1V11DR1 1R1202240ROOM=SOCPP1V111C124010UFROOM=SOC1C12412.2UFROOM=SOC1C12422.2UFROOM=SOC1C12432.2UFROOM=SOC1C12442.2UFROOM=SOC1C12482.2UFROOM=SOC20% 2 6.3V CERM-X5R 0402-920% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 02011% 1/32W MF 2 0 B11 B15 B23 B25 D16 D20 D22 E15 E17 E19 E21 DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF C21 AP17 V31 P51% 1/32W MF 2 01005240ROOM=SOC1% 1/32W MF 2 01005240R1203240ROOM=SOC1R12042401R1205240ROOM=SOC1% 1/32W MF 2 010051% 1/32W MF 2 01005 ROOM=SOC1% 1/32W MF 2 01005 ROOM=SOCU0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 11 OF 14 VDDIO11_DDR0ROOM=SOCDDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF DDR0_ZQ DDR3_ZQ PMU_TO_OWL_SLEEP1_READYIN9 16ROOM=SOCROOM=SOCROOM=SOCC12454.3UF1 20% 4V CERM 0402 3C12461UF1 20% 4V CERM 0402 3C12470.47UF1 20% 6.3V CERM 0402 3DDR0_ZQ B21 DDR3_ZQ P2 DDR0_RET* DDR1_RET* DDR2_RET* DDR3_RET* C18 AP15 Y31 U4 F19 AK18 W26 P8CRITICALOMIT_TABLE2 42 42 41.1V @7mA MAX100OHM-25%-0.12A1 01005ROOM=SOCFL1280PP1V1_DDR_PLLVOLTAGE=1.1V12PP1V111 14C0.802-TBDV @1.1A MAX14 7 60.8V @TBDA MAX 0.9V @TBDA MAX 1.0V @1.0A MAXAA15 AA21 AA25 AB18 AC15 AC21 AC25 AD14 AD18 AE21 AE25 AF18 AG15 AG21 AH25 AH14 AH18 AJ21 AK16 F12 G10 V18 AL17 J25 L25 N25 R25 R7 AN6 U25 W15 W21 W25 Y18 F21 F26 AB28 AC27 G18 AK20 F16 R16 T8 V7 U19 W27 U27 AF4 AF27 U21PP_FIXEDROOM=SOC ROOM=SOC ROOM=SOCU0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 VDD_CPU_SRAM SYM 10 OF 141C120010UFROOM=SOCC12014.3UF1 20% 4V CERM 0402 3C120220% 4V CERM
2 4C12030.47UF1 20% 6.3V CERM 0402 320% 2 6.3V CERM-X5R 0402-91UFCRITICALROOM=SOCAC11 AC7 AC9 AA13 AG11 AG7 AG9 AK12 H12 H18 R21 U15 J15 J21 J9 K12 K18 M10 M14 M16 M20 P18 R11 R13 U13 V10 M22PP_CPU_SRAMROOM=SOC ROOM=SOC ROOM=SOC14C12200.47UF1 20% 6.3V CERM 0402 3C122120% 4V CERM
2 4C12224.3UF1 20% 4V CERM 0402 31C12232.2UFROOM=SOC1UF20% 2 6.3V X5R-CERM 0201AN19 AR18 AR21 AR8 AT13 AT16 AM14 AM16 AM18 AM20 AR15 AN13 AN15VDDIO11_PLL_DDRC12800.22UFROOM=SOC20% 2 6.3V X5R 01005-1VDDIO11_DDR1CD19 AN17 W31 T4PP1V1_SDRAM1.06 - 1.17V12 14 15VDDIO11_RET_DDR2 424OMIT_TABLE242 4 AB29 V29 Y29 Y35 AB35 AG34 M34 R35 T29 T34 AA30 U30 AC30 DDR0_SYS_ALIVE DDR1_SYS_ALIVE DDR2_SYS_ALIVE DDR3_SYS_ALIVE C19 AP16 W32 T3SYSTEM_ALIVEIN13 16 170.8V @0.5A MAXPP_GPU_SRAMROOM=SOC ROOM=SOC ROOM=SOC14C12244.3UF1 20% 4V CERM 0402 3C122520% 4V CERM
2 4C12264.3UF1 20% 4V CERM 0402 31C12272.2UFROOM=SOC1UFVDDIO11_DDR2VDD_GPU_SRAM20% 2 6.3V X5R-CERM 02012 42 4BVDD_FIXEDAA1 AC2 V6 W2 H2 M2 U5 P6 T6 U1 N5 R5 W5BVDDIO11_DDR3A0.756-TBDV @44mA MAX15SYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AAPP0V8_OWL1C12501.0UFROOM=SOCAH29 AD29 AF29SOC:POWER (2/3)DRAWING NUMBER SIZEVDD_LOWRApple Inc.NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED051-1902REVISIOND20% 2 6.3V X5R 0201-1A.0.0BRANCH PAGE12 OF 49SHEET11 OF 5987654321 87654321DCBAA1 A2 A11 A16 A21 A24 A25 A27 A34 A35 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA24 AA26 N8 AA28 AA35 AB1 C17 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AB30 AC1 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 T5 AC28 AC34 AC35 AD5 AD7 AD9 AD11 AD15 AD17 AD19 AD21 AD23 AD25 AD27 AD33 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE22 AE24 AE26 AE29 AE30 AE35 AF5 AF7 AF9 AF11 AF15 AF17 AF19 AF21U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 13 OF 14CRITICALROOM=SOCOMIT_TABLEVSSVSSAF23 AF25 AF30 AG1 AG2 AG3 AG6 AG8 AG10 AG14 AG16 AG18 AG20 AG22 AG24 U7 AG29 AG33 AG35 AH5 AH7 AH9 AH11 AH13 AH15 AH17 AH19 AH21 AH23 AH27 AJ6 AJ8 AJ10 AJ12 AJ14 AJ16 AJ18 W8 AJ22 AG12 AK24 AJ28 AK2 AK3 AK5 AK7 AK9 AK11 AK13 AK15 B28 AK17 M15 AP28 AK26 AK30 AK34 AK29 AL6 AL8 AL10 AL12 AF28 AL14 AM29 AL16 AR27 AL18 Y30 AL20 AL25 AL28 AL30 AL31 AM7 AM9 AM11 AM13 AM15 AM17 AM19 AM21 AM33 AM34 AM35 AN3 AN5 AN16 AN8 AN10AN12 AN14 AN18 AN29 AN33 AP2 AP13 AP14 AP20 AP25 AP26 AP27 AP30 AP31 AP32 AP33 AR1 AR5 AR9 AR14 AR16 AR25 AR34 AR35 AT1 AT2 AT6 AT8 AT9 AT14 AT17 AT18 AT21 AT25 AT34 AT35 B1 B2 B16 B20 B22 B24 B27 B34 B35 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C20 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 D3 D4 D5 D6 D11 D17 D21 D23 D26 D27 D28 D29 D30 E1 E3 E4 E5 D7 E9U0600MAUI-2GB-25NM-DDR-HFCMSP SC58980B0B-A040 SYM 14 OF 14CRITICALROOM=SOCOMIT_TABLEVSSVSSE12 E16 E18 E20 E22 E24 E26 E29 E32 F4 F5 F7 F9 F11 F13 F15 F18 D18 F23 E30 F25 F27 F28 F29 G4 G5 G6 G8 G12 G14 G16 E6 G22 G24 G26 G28 G33 H1 H7 H9 H11 H13 H15 H17 E28 H21 H23 H25 H27 H29 J2 J5 J6 J30 J8 J10 J12 J14 J16 J18 J20 J22 J24 J26 J28 K7 K9 K11 K13 K15 K17 K19 K21 K23 K25 K27 K29 K34 K35 L1 L5 L6 K4 L8 L10 L12 L14 L16 L18 L20MAUI - POWER SUPPLIES1.70-1.95V @100mA(TBD)33 31 30 27 24 16 15 14 8MAXA10 A26 AD1 AH35 AT22 AT7 G1 L35 A15 A23 AB34 AD2 AH34 AR13 AR17 AR22 AR7 AT15 B10 B26 G2 L34 N2 R1 U34 V2 W35DU0600MAUI-2GB-25NM-DDR-HVDD1 FCMSP SC58980B0B-A040 SYM 12 OF 14PP1V8_SDRAM1C13002.2UFROOM=SOC1C13012.2UFROOM=SOC1C13022.2UFROOM=SOC20% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201CRITICALROOM=SOC1.06-1.17V @1.3A(TBD) MAX15 14 11PP1V1_SDRAM1OMIT_TABLEC131010UFROOM=SOC1C13122.2UFROOM=SOC1C13132.2UFROOM=SOC1C13142.2UFROOM=SOC20% 2 6.3V CERM-X5R 0402-920% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201CUF) MOVED TO PP1V1 TO HELP WITH DDR PI (SAME AS N66).ROOM=SOCROOM=SOCC13161UF1 20% 4V CERM 0402 3C13171UF1 20% 4V CERM 0402 3VDD22 42 41.62-1.98V @41mA MAX21 20 17 14 13 12 9 8 7 6 5 3 33 29PP1V81C132010UFROOM=SOC1C13212.2UFROOM=SOC1C13222.2UFROOM=SOC1C13232.2UFROOM=SOC20% 2 6.3V CERM-X5R 0402-920% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201VDDIO18_GRP10:1.62-1.98V @8mA VDDIO18_LPOSC:1.62-1.98V @1mA19 14MAX MAXPP1V8_IMU_OWL PP1V8_ALWAYS PP1V8VDD18_FMON :1.62-1.98V @1mA MAX VDD18_UVD :1.62-1.98V @5mA MAX VDD18_AMUX :1.62-1.98V @1mA MAX VDD18_TSADC:1.645-1.89V @2mA MAX117 15 81.62-1.98V @1mAMAXF30 H30 K30 M30 VDDIO18_GRP1 N31 P30 H5 VDDIO18_GRP2 K5 AN9 AA5 AC5 VDDIO18_GRP3 AG5 AL5 AM23 VDDIO18_GRP4 AE28 VDDIO18_GRP10 AG28 Y5 VDDIO18_GRP11 AG26 AM22 AD13 AN24 AG13 AK8 AB8 N20 U23 AK23 VDD18_LPOSC VDD18_FMON VDD18_UVD VDD18_AMUXVSS(OWL) (AON)21 20 17 14 13 12 9 8 7 6 5 3 33 29C13302.2UFROOM=SOC20% 2 6.3V X5R-CERM 0201VDD18_TSADCU14 U16 U18 U22 U24 U26 U28 U35 V1 V5 AA29 U29 V9 V11 V13 V15 V17 V19 V21 V23 V25 V27 W30 W1 W6 W10 W12 W14 W16 W18 W20 W22 W24 W28 W29 W34 Y1 Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 Y27 Y34 AC29 AD28 AE27 AG27 AJ30 AJ35 AK19 AT27 D31 G30 L30 P4 U8 V30 A28 AL32 T21CBSYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASOC:POWER (3/3)DRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED13 OF 49SHEET12 OF 5987654321 87654321S3E NANDR153021 20 17 14 13 12 9 8 7 6 5 3 33 29PP1V8124.9 21% 1/32W MF 01005PP1V8_NAND_AVDDVOLTAGE=1.8V1DC15302.2UFROOM=NAND1C15310.1UFROOM=NANDDROOM=NAND20% 2 6.3V X5R-CERM 02011320% 2 6.3V X5R-CERM 01005NAND_AGNDVOLTAGE=0V120% 6.3V 2 CERM-X5R 0402-9ROOM=NAND10UFC15341C152015UFROOM=NAND1C152115UFROOM=NAND1C152210UFROOM=NAND1C15240.1UFROOM=NAND1C1525100PFROOM=NAND120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 6.3V 2 CERM-X5R 0402-920% 2 6.3V X5R-CERM 010055% 2 16V NP0-C0G 0100520% 6.3V 2 CERM-X5R 0402-9ROOM=NAND10UFC1523PP3V0_NAND115C150015UFROOM=NAND1C150115UFROOM=NAND1C150215UFROOM=NAND1C150315UFROOM=NAND1C15321.0UFROOM=NAND1C15260.1UFROOM=NAND1C15271.0UFROOM=NAND1C1528220PFROOM=NAND1C152933PFROOM=NAND1C15338.2PFROOM=NAND20% 2 6.3V X5R 0201-120% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R 0201-110% 10V 2 X7R-CERM 01005+/-0.5PF 5% 16V 2 2 16V NP0-C0G-CERM NP0-C0G-CERM EXTRA CAPS ADDED FOR UF BLOCKING AND DESENSE MITIGATION.20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1EXTRA CAPS ADDED FOR UF BLOCKING AND DESENSE MITIGATION.1C15041.0UFROOM=NAND1C15061.0UFROOM=NAND1C1510220PFROOM=NAND1C15110.1UFROOM=NAND1C151233PFROOM=NAND1C15138.2PFROOM=NAND1C1516100PFROOM=NAND1C151456PFROOM=NAND1C15151UFROOM=NAND15PP0V9_NAND120% 2 6.3V X5R 0201-1120% 2 6.3V X5R 0201-110% 2 10V X7R-CERM 0100520% 2 6.3V X5R-CERM 010055% 2 16V NP0-C0G-CERM 01005+/-0.5PF 2 16V NP0-C0G-CERM 010055% 2 16V NP0-C0G 010052% 2 50V NP0-C0G 020120% 2 6.3V X5R 0201C154810UFROOM=NANDC154015UFROOM=NAND1C154115UFROOM=NAND1C20% 6.3V 2 CERM-X5R 0402-920% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 6.3V 2 CERM-X5R 0402-9ROOM=NAND10UFC1542120% 6.3V 2 CERM-X5R 0402-9ROOM=NAND10UFC15431C15461.0UFROOM=NAND1C15471.0UFDEFAULT_CAPACITOR_56.000000pF_2_1 120% 2 6.3V X5R 0201-120% 2 6.3V X5R 0201-1C15171.0UFROOM=NAND1C1507100PFROOM=NAND1C1508100PFROOM=NAND1C150510UFROOM=NANDCROOM=NAND20% 2 6.3V X5R
OB0 OB10 OF0 OF10 R5 OA0 OA10 OD0 OD10 OG0 OG105% 2 16V NP0-C0G 010055% 2 16V NP0-C0G 0100520% 6.3V 2 CERM-X5R 0402-91C15500.1UFROOM=NAND1C15510.1UFROOM=NAND1C1554M4 J5 J7 K4 K6 C3 E5 PCI_AVDD_CLK1 PCI_AVDD_CLK2 VDD VDD VDD VDD VDD VDD VDD A3 A7 F2 J1 J9 R3 R7AVDD1PCI_AVDD_H21 20 17 14 13 12 9 8 7 6 5 3 33 29NOSTUFF 1ROOM=NANDC15600.01UFROOM=NAND1R156010KROOM=NAND10% 2 6.3V X5R 010051% 1/32W MF 2 01005PCI_VDD1 PCI_VDD2U1500VLGANOSTUFF 18C15610.01UFROOM=NAND1R156110K13 6 13 6IN IN IN OUTNAND_VREF AP_TO_NAND_SYS_CLK PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N PCIE_NAND_TO_AP_CLKREQ_L PCIE_NAND_RESREF PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N PCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_N PCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_N AP_TO_NAND_RESET_LNCD2 H8 H6 G9 M6 M8 K8 N5 N3 P8 N7 M2 K2VDDIO VDDIO VDDIO VDDIO VDDIO VDDIOVREFVCC VCC VCC VCC VCC VCCPP1V820% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0100510% 2 6.3V X5R-CERM 010051000PF10% 2 6.3V X5R 010051% 1/32W MF 2 01005CLK_IN PINUSE=BI PCIE_REFCLK_P PINUSE=BI PCIE_REFCLK_M PCIE_CLKREQ* PCI_RESREF PINUSE=BI PCIE_RX0_P PINUSE=BI PCIE_RX0_M PINUSE=BI PCIE_RX1_P PINUSE=BI PCIE_RX1_M PINUSE=BI PCIE_TX0_P PINUSE=BI PCIE_TX0_M PINUSE=BI PCIE_TX1_P PINUSE=BI PCIE_TX1_MVER-1BOMOPTION=OMIT_TABLE ROOM=NAND CRITICALROOM=NAND61R15013.01KROOM=NAND13 6 13 6IN IN IN IN OUT OUT OUT OUTEXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_NCE EXT_NRE EXT_NWE EXT_RNB EXT_CLE EXT_ALEG3 J3 H2 E3 E7 F6 C7 B8 G1 F4 C5 G5 H4 D4PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAPNC NC NC NC NCIN IN16 8ROOM=NANDSYSTEM_ALIVE PCIE_AP_TO_NAND_RESET_L SWD_AP_BI_NAND_SWDIO_R SWD_AP_NAND_SWCLK_RIN IN11 16 17PPPPP3MM-NSM SM 1B1% 1/20W MF 2 201613 6 13 61 2 SWD_AP_BI_NAND_SWDIO 0% MF WROOM=NAND0.00BI9R15211 2 SWD_AP_PERIPHERAL_SWCLK 0% MF WROOM=NAND6 60.00BIN9 33NC NC6 61PP SMPP15215INF8 D8 D6P3MM-NSMRESET* TRST* VSSA ZQROOM=NANDNAND_ZQ134.80.5% 1/32W MF 2 0100513NAND_AGNDROOM=NANDPCIE RECEIVE-SIDE PROBE POINTSROOM=NAND13 6 13 6PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_NP3MM-NSM SM 1PP PP SM1PP1500 PP1501SYNC_MASTER=N/APAGE TITLEP3MM-NSMROOM=NANDA13 6 13 6B4 B6 OE10 G7 L3 L5 L7 P2 P4 P6 OC0 OC10 OE0B2R1500VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSROOM=NANDPCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_NP3MM-NSM SM 1PP PP SMSYNC_DATE=N/AA1PP1502 PP1503NANDDRAWING NUMBER SIZEP3MM-NSMROOM=NAND ROOM=NAND13 6 13 6RApple Inc.NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED051-1902REVISIONDPCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_NP3MM-NSM SM 1PP PP SMA.0.0BRANCH PAGE1PP1504 PP1505P3MM-NSMROOM=NAND15 OF 49SHEET13 OF 5987654321 87654321ANTIGUA PMU - Buck SuppliesCRITICALD15 33 28 27 26 25 24 22 21 17 15U2000INOMIT_TABLEDUXUVAI21.0UH-20%-3.6A-0.060OHMBUCK0_LX0 A3 B3 C3L2000D1VCC_MAIN_SNS1PP_VCC_MAIN1BAT/USBC208510UFROOM=PMU1C208610UFROOM=PMU1C208710UFROOM=PMUC208810UFROOM=PMU20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-9V3 VDD_MAIN_SNS R6 F10 L13 L5 VDD_MAIN R8 L4 A4 B4 C4CSP SYM 2 OF 5ROOM=PMUBUCK0_LX02 PIQA20161T-SMPP_CPUOMIT_TABLEROOM=PMU10CRITICAL10.47UH-20%-3.8A-0.048OHMBUCK0_LX1 A5 B5 C5L2001C200015UFROOM=PMU1C200115UFROOM=PMU1C200215UFROOM=PMU1C200315UFROOM=PMU1C200415UFROOM=PMU1C200515UFROOM=PMUVOLTAGE=1.03V 0.625V/0.9V/1.03VBUCK0_LX11 PIQA20121T-SM220% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-112.5A MAXBUCK0CRITICALOMIT_TABLEROOM=PMUVDD_BUCK0_01 A7 B7 C71.0UH-20%-3.6A-0.060OHML200211C20892.2UFROOM=PMU1C20902.2UFROOM=PMU1C20912.2UFROOM=PMU1C20922.2UFROOM=PMU20% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201A8 B8 C8 A16 B16 C16BUCK0_LX21 PIQA20161T-SM2C200615UFROOM=PMU1C200715UFROOM=PMU1C200815UFROOM=PMU1C200915UFROOM=PMU1C201015UFROOM=PMUVDD_BUCK0_23BUCK0_LX2CRITICALOMIT_TABLEROOM=PMU20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1VDD_BUCK1_01BUCK0_LX31C20932.2UFROOM=PMU1C20942.2UFROOM=PMU1C20952.2UFROOM=PMU1C20962.2UFROOM=PMUA9 B9 C90.47UH-20%-3.8A-0.048OHM 2 1 BUCK0_LX3 CRITICAL PIQA20121T-SMOMIT_TABLEROOM=PMUL2003BUCK INPUT20% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201A12 B12 C12 J17 J18 J19VDD_BUCK1_23BUCK0_FB F8BUCK0_PP_CPU_FB1.0UH-20%-3.6A-0.060OHML2010IN10C1VDD_BUCK2BUCK1_LX0A17 B17 C17BUCK1_LX02 PIQA20161T-SM1PP_GPUOMIT_TABLEROOM=PMU10CRITICAL1C20972.2UFROOM=PMU1C20982.2UFROOM=PMU1C2099100PFROOM=PMU20% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 02015% 2 16V NP0-C0G 01005T18 T19 V12 Y12 Z12 N17 N18 N19 J1 J2 E1 E2 E17 E18 E19VDD_BUCK3 A15 B15 C150.47UH-20%-3.8A-0.048OHML2011C201215UFROOM=PMU1C201315UFROOM=PMU1C201415UFROOM=PMU1C201515UFROOM=PMU1C201615UFROOM=PMUVOLTAGE=0.9V 0.70V/0.80V/0.9VC10.5A MAXBUCK1_LX11 PIQA20121T-SM220% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1BUCK1VDD_BUCK4BUCK1_LX1CRITICALOMIT_TABLEROOM=PMU1.0UH-20%-3.6A-0.060OHMVDD_BUCK5 BUCK1_LX2 VDD_BUCK6 A11 B11 C11 A13 B13 C13L20121BUCK1_LX21 PIQA20161T-SM2C201715UFROOM=PMU1C201815UFROOM=PMU1C201915UFROOM=PMU1C202015UFROOM=PMU1C202115UFROOM=PMU1C201115UFROOM=PMUCRITICALOMIT_TABLEROOM=PMU20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-10.47UH-20%-3.8A-0.048OHML2013BUCK1_LX32 PIQA20121T-SM1VDD_BUCK7BUCK1_LX3OMIT_TABLEROOM=PMUCRITICALVDD_BUCK8BUCK1_FB F12BUCK1_PP_GPU_FB1.0UH-20%-3.6A-0.060OHML2020IN1029 21 20 17 13 12 9 8 7 6 5 3 33PP1V8U18 V18 Y18 Z18 VOLTAGE=1.8VBUCK3_SW1BUCK2_LX0H17 H18 H19BUCK2_LX01 PIQA20161T-SM2PP_SOCOMIT_TABLEROOM=PMU104.7A MAXCRITICAL1BUCK229 28 20 19 12PP1V8_TOUCH PP1V8_IMU_OWLVOLTAGE=1.8VU16 BUCK3_SW2 U15 BUCK3_SW3 BUCK2_LX1 BUCK4_SW10.47UH-20%-3.8A-0.048OHMK17 K18 K19L2021C202215UFROOM=PMU1C202315UFROOM=PMU1C202415UFROOM=PMU1C202515UFROOM=PMU1C202615UFROOM=PMUVOLTAGE=0.825V 0.725V/0.825VB11BUCK2_LX12 PIQA20121T-SM120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1PP1V1VOLTAGE=1.1VV16 Y16 Z16OMIT_TABLEROOM=PMUCRITICALBBUCK2_FB J14BUCK2_PP_SOC_FB1.0UH-20%-3.6A-0.060OHM1.1A MAXBUCK511 7 6PP_FIXEDVOLTAGE=0.85V11.0UH-20%-3.6A-0.060OHM 2 1 BUCK5_LX0 PIQA20161T-SM CRITICALL2050IN10L2030C205015UFROOM=PMU1C205115UFROOM=PMUOMIT_TABLEROOM=PMU20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1XW2050 SHORT-10L-0.1MM-SM2 1ROOM=PMUM17 M18 M19BUCK5_LX0BUCK3_LX0R18 R19BUCK3_LX01 PIQA20161T-SM2PP1V8_SDRAMOMIT_TABLE VOLTAGE=1.8V11.5A MAX8 12 15 16 24 27 30 31 33BUCK3CRITICALXW2030 ROOM=PMU SHORT-10L-0.1MM-SMBUCK3_FB V19 U17 V17 Y17 Z17C203015UFROOM=PMU1C203115UFROOM=PMU1C2032100PFROOM=PMUBUCK5_FBM13 BUCK5_FBBUCK3_FB12ROOM=PMU400mA MAXBUCK621 20PP1V2_CAMERAVOLTAGE=1.2V11UH-20%-1.2A-0.320OHM 2 1 BUCK6_LX0L2060ROOM=PMU20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-15% 2 16V NP0-C0G 010050603C206015UFROOM=PMU1C206115UFROOM=PMU1 2C20625% 16V NP0-C0G 01005H1 H2VBUCK3_SW BUCK6_LX0100PF20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-121INCRITICAL BUCK6_FB CRITICALJ5 BUCK6_FB4.7A MAXROOM=PMU1.1A MAXBUCK711PP_CPU_SRAMVOLTAGE=1.0V 0.80V/0.90V/1.0V11.0UH-20%-2.25A-0.15OHM 2 1 BUCK7_LX0PIXB2016FE-SML2070ROOM=PMU1.0UH-20%-3.6A-0.060OHMF1 F2 BUCK4_LX0 V11 Y11 Z11L2040BUCK4BUCK4_LX01 PIQA20161T-SM2PP1V1_SDRAMOMIT_TABLEROOM=PMU11 12 15CRITICAL1VOLTAGE=1.1VBUCK7_LX0C207015UFROOM=PMU1C207115UFROOM=PMUA1.1A MAX1120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1XW2070 SHORT-10L-0.1MM-SM2 10.47UH-20%-3.8A-0.048OHML2041C204015UFROOM=PMU1C204115UFROOM=PMU1C204215UFROOM=PMU1C204315UFROOM=PMU1C2044100PFROOM=PMUBUCK7_FBC1 BUCK7_FB BUCK4_LX1 F17 F18 F19ROOM=PMUPP_GPU_SRAMVOLTAGE=1.0V 0.80V/0.90V/1.0V11.0UH-20%-2.25A-0.15OHM 2 1 BUCK8_LX0PIXB2016FE-SML2080ROOM=PMUV13 Y13 Z13BUCK4_LX11 PIQA20121T-SM220% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-15% 2 16V NP0-C0G 01005CRITICALOMIT_TABLEROOM=PMUSYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AAXW2040 SHORT-10L-0.1MM-SMBUCK4_FB1 2ROOM=PMUBUCK8BUCK4_FB T9 BUCK8_LX0 V15 Y15 Z15SYSTEM POWER:PMU (1/3)DRAWING NUMBER SIZEC208015UFROOM=PMU1C208115UFROOM=PMUCRITICALSHORT-10L-0.1MM-SM 2 1ROOM=PMU20% 2 6.3V X5R 0402-120% 2 6.3V X5R 0402-1XW2080Apple Inc.R051-1902REVISIONDBUCK8_FBVBUCK4_SW C19 BUCK8_FBA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED20 OF 49SHEET14 OF 5987654321 8765432ANTIGUA LDO SPECS1ANTIGUA PMU - LDOs33 28 27 26 25 24 22 21 17 14LDO# LDO1 (A) LDO2 (B) LDO3 (A)ADJ.RANGE 2.5-3.3V 1.2-2.0V 2.5-3.3V 0.7-1.2V 2.5-3.3V 1.2-3.6V 2.5-3.3V 2.5-3.3V 2.5-3.3V 0.7-1.2V 2.5-3.3V 1.8V 2.5-3.3V 0.8-1.5V 1.2-2.0VACCURACY +/-1.4% +/-2.5% +/-1.4% +/-2.5% +/-2.5% +/-2.5% +/-25mV +/-25mV +/-25mV +/-5.5% +/-25mV +/-5% +/-25mV +/-2.5% +/-2.5%MAX.CURRENT 50mA 50mA 50mA 100mA 1000mA 150mA 250mA 250mA 250mA 1335mA 250mA 10mA 250mA 250mA 50mAPP_VCC_MAIN1DSHORT-10L-0.1MM-SM 2 1 VCC_MAIN_SNSROOM=PMU PLACE_NEAR=UmmLDO4 (D)DC212010UFROOM=PMU1C212110UFROOM=PMU1C212210UFROOM=PMULDO5 (F) LDO6 (C1) LDO7 (C) LDO8 (C)XW210520% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-914OUT1C212310UFROOM=PMU1C212410UFROOM=PMU1C212510UFROOM=PMULDO9 (C) LDO10 (G) LDO11 (C) LDO12 (E)20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 6.3V 2 CERM-X5R 0402-91C212610UFROOM=PMU1C212710UFCRITICALLDO13 (C) LDO14 (H) LDO15 (B)20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-9ROOM=PMUU2000M3 V2 M2 U1 U2 L2 Y6 Y4 Y3 Y9 Z9 R3 Y5 Y7 N2 K3 VDD_LDO1_3 VDD_LDO2 VDD_LDO4 VDD_LDO5 VDD_LDO6 VDD_LDO7 VDD_LDO8 VDD_LDO9 VDD_LDO10 VDD_LDO11 VDD_LDO13 VDD_LDO14 VDD_LDO15 VDD_BYPASS LDO CSP SYM 1 OF 5ROOM=PMUOMIT_TABLEDUXUVAI214 12 11PP1V1_SDRAMC21302.2UF1C21312.2UFROOM=PMU1LDO INPUTC20% 6.3V X5R-CERM 2 0201ROOM=PMU20% 6.3V X5R-CERM 2 0201VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6 VBYPASS VLDO7 VLDO8 VLDO9 VLDO9_FB VLDO10 VLDO11 VLDO12 VLDO13 VLDO14 VLDO1533 31 30 27 24 16 14 12 8PP1V8_SDRAMC21322.2UFROOM=PMU120% 6.3V 2 X5R-CERM 0201P12 VPP_OTPM1 V1 L1 N1 T1 T2 K1 K2 Z6 Z4 Z3 Y2 Y8 Z8 R2 K6 Z5 Z7 P2VOLTAGE=3.3V VOLTAGE=1.8V VOLTAGE=0.8V VOLTAGE=3.0V VOLTAGE=3.3V VOLTAGE=3.0V VOLTAGE=2.775V VOLTAGE=2.85VPP3V3_USB PP1V8_VA PP3V0_TRISTAR PP0V8_OWL PP3V0_NAND PP3V3_ACC PP3V0_PROX_ALS PMU_LDO8 PP2V85_CAM_AVDD_PMU PP0V9_NAND PP3V0_PROX_IRLED PP1V8_ALWAYS PP3V0_MESA PP1V2 PP1V8_MESA5 24 25 26 19 27 30 31 33 11 13LDO1 LDO2 LDO3 LDO4 LDO5 LDO6 LDO7 LDO8 LDO9 LDO10 LDO11 LDO12 LDO13 LDO14 LDO15C302020CAM_AVDD_FBPLACE_NEAR=Umm12XW2100SHORT-10L-0.1MM-SMROOM=PMUVOLTAGE=0.9V VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=1.2V VOLTAGE=1.8V1320 8 12 17 28 5 6 7 28U2000DUXUVAI2D10 D11 D12 D13 D14 D15 D16 D17 D18 D2 D5 D6 D7 D8 D9 D3 E10 E11 E12 E13 D4 E15 E16 E3 E4 E5 E7 E8 E9 F14 F15 F16 F3 F4 G14 G15 G16 G3 G4 H15 H16 H3 H4 CSP SYM 5 OF 5ROOM=PMUVPUMP U19PMU_VPUMP1C210047NFROOM=PMU1C21012.2UFROOM=PMU1C21032.2UFROOM=PMU1C21052.2UFROOM=PMU1C21074.3UFROOM=PMU1C21092.2UFROOM=PMU1C21114.3UFROOM=PMU1C21132.2UFROOM=PMU1C21154.3UFROOM=PMUVPUMP:10nF min. @ 4.6VJ15 J16 J3 J4 K15 K16 L15 L16 M14 M15 M16 N14 N15 N16 P13 P14 P15 P16 P17 R13 R14 R15 R16 R17 T10 T11 T12 T13 T14 T15 T17 U10 U11 U12 U13 U14 U4 U5 U6 V4 V5 V6CRITICALOMIT_TABLE20% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 4V X5R-CERM 061020% 2 6.3V X5R-CERM 020120% 2 4V X5R-CERM 061020% 2 6.3V X5R-CERM 020120% 2 4V X5R-CERM 0610U2000DUXUVAI2A1 A10 A14 A18 A19 A2 A6 B1 B10 B14 B18 B19 B2 B6 C10 C14 C18 C2 C6 D1 D19 E14 G1 G17 G18 G19 G2 H7 J6 K12 K7 L17 L18 L19 L6 L7 CSP SYM 4 OF 5ROOM=PMU1C21022.2UFROOM=PMUNOSTUFF1C21042.2UFROOM=PMU1C21062.2UFROOM=PMU1C21082.2UFROOM=PMU1C21102.2UFROOM=PMU1C21122.2UFROOM=PMU1C21142.2UFROOM=PMUBCRITICALOMIT_TABLENCNCVSSAL9 M8 M9 N10 N12 N13 N9 P10 P11 P18 P19 P5 R10 R11 R12 R9 T16 T3 T6 T8 U3 U9 V10 V14 V8 V9 Y1 Y10 Y14 Y19 Z1 Z10 Z14 Z19 Z220% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201BPMU_VSS_RTC16NOTE: T3 IS XTAL REF GNDSYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASYSTEM POWER:PMU (2/3)DRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED21 OF 49SHEET15 OF 5987654321 8765432CONTROL PIN NOTES: NOTE NOTE NOTE NOTE1ANTIGUA PMU - GPIOs, NTCsDCRITICAL33 31 30 27 24 15 14 12 8(1):INPUT PULL-DOWN 100-300k (2):INPUT PULL-DOWN 1M (3):INPUT PULL-UP OR DOWN 100k-300k (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UPDOMIT_TABLEPP1V8_SDRAM1U2000DUXUVAI2R2260100KROOM=PMU1R2261100K5 30 8CSP SYM 3 OF 5IN IN INRESETSREFS5% 1/32W MF 2 0100533 9 5 35% 1/32W MF 2 01005ROOM=PMUAP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT1_L OWL_TO_PMU_SHDN OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY PMU_TO_OWL_CLK32K PMU_TO_WLAN_CLK32KOUTPMU_TO_SYSTEM_COLD_RESET_L1C22601000PFROOM=PMU9INP7 P8 P9 K4 N8 N3 N7 P3 P4RESET_IN1 RESET_IN2 RESET_IN3 RESET* SHDN SLEEP1_REQ SLEEP1_RDY ACTIVE_REQ ACTIVE_RDYROOM=PMU (3) (3) (3) (4) (1)IREF K5 VREF M4PMU_IREF PMU_VREF1 1C22700.22UFROOM=PMUR2270200KROOM=PMU10% 2 6.3V X5R-CERM 010059 11 9 9 30 27 9 5IN OUT IN OUT OUT OUT(1)20% 2 6.3V X5R 02011% 1/20W MF 2 201(1)COMPARATORPRE_UVLO M5PMU_TO_AP_SOCHOT0_L PMU_VDROOP_OUT PMU_VDROOP_DET_IN1OUT89 33 16T4 SLEEP_32K R4 OUT_32K H6 SYS_ALIVE(4) (2) (4)VDROOP G517 13 11OUTSYSTEM_ALIVENC80.00 2 1/32W 1 MF 0% ROOM=PMU 010051 MF 1%R2201L3 TMPR_DET L8 IRQ* R7 SCL T7 SDAVDROOP_DET H5R/32W150ROOM=PMUAP_GPU_SENSE_POUT IN BIPMU_TO_AP_IRQ_L I2C0_AP_SCL I2C0_AP_SDA DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMU_TO_PMGR_MISO AP_TO_PMU_AMUX_OUTNCC22051000PFROOM=PMU01005IN10NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHzCNO_XNET_CONNECTION=133 27 16 8 33 27 810% 2 10V X5R 01005CIN 116 279 27 9 9IN OUT(1)PMGRINU7 SCLK U8 MOSI V7 MISO F13 G13 J12 H13 H14 K10 K11 K13 J13 N11 M12 L11 M10 L14 L12 M11 L10 K14 M6 M7 N4 N5 N6 AMUX_A0 AMUX_A1 AMUX_A2 AMUX_A3 AMUX_A4 AMUX_A5 AMUX_A6 AMUX_A7 AMUX_AY AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_BY TDEV1 TDEV2 TDEV3 TDEV4 TCAL(1)C22031000PF10% 01005ROOM=CHESTNUT5INBRICK_ID T5 ADC_IN R5TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX BUTTON_MENU_KEY_L BUTTON_HOLD_KEY_L BUTTON_RINGER_ANCADCIN16 302 6.3V X5R-CERMFOREHEAD NTC133 32 33 3233 32 16 8C2210 15% 16V 2 NP0-C0G 01005 ROOM=PMU201005 ROOM=PMUAMUX100PFR221010KOHM-1% FOREHEAD_NTC_RETURN29BUTTON_RINGER_A IN BUTTON_VOL_UP_L 8 IN BUTTON_VOL_DOWN_L 8 IN LCM_TO_CHESTNUT_PWR_EN 27 IN TRISTAR_TO_PMU_USB_BRICK_ID 30 16 27 16 CHESTNUT_TO_PMU_ADCMUX PMU_AMUX_AY 3 OUTIN INPLACE_NEAR=UmmBUTTON1 BUTTON2 BUTTON3 BUTTON4BUTTONSG6 F6 E6 F5IN IN IN8 9 28 33 8 9 32 33BUTTON1 + BUTTON2 ASSERTED FOR >TBD SECONDS CAUSES TWO-FINGER RESET8 16 32 3333 33BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 PMU_TO_WLAN_CLK32K BB_TO_PMU_AMUX_LDO11_SIM1 AP_TO_PMU_TEST_CLKOUT BB_TO_PMU_AMUX_SMPS4 PMU_AMUX_BY FOREHEAD_NTC REAR_CAMERA_NTC RADIO_PA_NTC AP_NTC PMU_TCAL PMU_XTAL1 PMU_XTAL2 PMU_VDD_RTC1NC NCREAR CAMERA NTC133 16 33 5 33IN IN IN IN OUTGPIOBC2220 15% 16V 2 NP0-C0G 01005 ROOM=PMU100PFR222010KOHM-1%2 01005 ROOM=PMU3RCAM_NTC_RETURNSHORT-10L-0.1MM-SM 2 ROOM=PMU 1NTCXW2210 XW2220 XW2230 XW2240RADIO PA NTC1 SHORT-10L-0.1MM-SM 2 ROOM=PMU 1XTALSHORT-10L-0.1MM-SM 2 ROOM=PMU 1P1 XTAL1 R1 XTAL2P6 VDD_RTCGPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21F7 TIGRIS_TO_PMU_INT_L G7 BB_TO_PMU_PCIE_HOST_WAKE_L J7 PMU_TO_BB_PMIC_RESET_R_L G8 TRISTAR_TO_AP_INT H8 STOCKHOLM_TO_PMU_HOST_WAKE J8 PMU_TO_NAND_LOW_BATT_BOOT_L K8 WLAN_TO_PMU_HOST_WAKE F9 CODEC_TO_PMU_MIKEY_INT_L G9 PMU_TO_BT_REG_ON H9 BT_TO_PMU_HOST_WAKE J9 PMU_TO_WLAN_REG_ON G10 NC H10 PMU_TO_CODEC_DIGLDO_PULLDN J10 CODEC_TO_AP_PMU_INT_L F11 PMU_TO_BB_USB_VBUS_DETECT G11 PMU_TO_STOCKHOLM_EN H11 NC K9 NC J11 PMU_TO_LCM_PANICB G12 NC H12 I2C0_AP_SCLIN IN17 33R220011.00K2PMU_TO_BB_PMIC_RESET_LOUT33IN IN OUT IN IN OUT IN OUT8 30 33 13 33 24 33 33 335% 1/32W MF 01005 ROOM=PMUBOUT IN OUT OUT24 8 24 33 33OUT29IN8 16 27 33C2230 15% 16V 2 NP0-C0G 01005 ROOM=PMU100PFR223010KOHM-1%2 01005 ROOM=PMUPA_NTC_RETURNSHORT-10L-0.1MM-SM 2 ROOM=PMU 1C22020.22UFROOM=PMU20% 2 6.3V X5R 0201AP NTC1CRITICAL32.768KHZ-20PPM-12.5PF1 2Y2200ROOM=PMUC2240 1A5% 16V 2 NP0-C0G 01005 ROOM=PMU100PFR224010KOHM-1%2 01005 ROOM=PMU1C2250100PF1R22503.92KC2200 118PF5% 16V 2 CERM 01005151.60X1.00-SM1C220118PFAP_NTC_RETURN5% 2 16V NP0-C0G 01005 ROOM=PMU0.1% 1/20W MF 2 0201 ROOM=PMUROOM=PMUPMU_VSS_RTCVOLTAGE=0.0V5% 2 16V CERM 01005XW2200SHORT-10L-0.1MM-SM 1 2ROOM=PMUSYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AAROOM=PMUSYSTEM POWER:PMU (3/3)DRAWING NUMBER SIZEApple Inc.NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADCR051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED22 OF 49SHEET16 OF 5987654321 87654321DDTIGRIS CHARGERAPN:343S00033PP_VCC_MAINVOLTAGE=4.3V114 15 21 22 24 25 26 27 28 33C23332.2UFROOM=CHARGER1C233010UFROOM=CHARGER1C233110UFROOM=CHARGER1C23322.2UFROOM=CHARGER20% 2 6.3V CERM-X5R 0402-920% 2 6.3V CERM-X5R 0402-920% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201CTIGRIS_PMIDA2 VDD_MAIN B2 VDD_MAIN D2 VDD_MAIN C2 VDD_MAINTIGRIS_LDO1CC2307100PFROOM=CHARGER1C23052.2UFA2 A3 B1 B2 B31C23204.2UFROOM=CHARGER1C23214.2UFROOM=CHARGER1C2322100PF1C2323100PF5% 2 16V NP0-C0G 0100520% 2 6.3V X5R-CERM 0201ROOM=CHARGERCRITICALS10% 2 16V X5R-CERM 0402-110% 2 16V X5R-CERM 0402-15% 2 35V NP0-C0G 010055% 2 35V NP0-C0G 01005Q2300CSD68827WBGAROOM=CHARGEROMIT_TABLEROOM=CHARGERROOM=CHARGERCRITICALLDO G4 BOOT G5 BUCK_SW BUCK_SW BUCK_SW BUCK_SW BAT BAT BAT BATA4 B4 D4 C4 A1 B1 D1 C1A1 GF531 30 3PMID VBUS VBUS VBUS VBUS VBUS SDA SCL SYS_ALIVE VBUS_OVP_OFF INT VBUS_DETU2300SN2400AB0WCSPROOM=CHARGER0.047UFC23001 10% 16V X5R 0201 21.0UH-20%-3.6A-0.060OHM1 PIQA20161T-SMROOM=CHARGERL2300PP5V0_USB1C23104.2UFROOM=CHARGER1C2311100PF15 12 8PP1V8_ALWAYS110% 2 16V X5R-CERM 0402-15% 2 35V NP0-C0G 01005A5 B5 D5 C5 E5BI INTIGRIS_BOOT2D C1 C2 C3CRITICALROOM=CHARGERC2301 15% 16V NP0-C0G 2 01005ROOM=CHARGERR2310100KROOM=CHARGERROOM=CHARGER33 30 26 25 8 33 30 26 25 8TIGRIS_BUCK_LX100PFC2302 15% 16V NP0-C0G 2 01005ROOM=CHARGER100PF5% 1/32W MF 2 01005I2C1_AP_SDA I2C1_AP_SCL SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_R_L TIGRIS_VBUS_DETECTG3 E4 E3 F4 G2 F116 13 11R231116PP_BATT_VCC VBATT_SENSE TIGRIS_ACTIVE_DIODE SWI_AP_BI_TIGRIS_FET TIGRIS_TO_BATTERY_SWI NOSTUFFBI183 1830INOUTTIGRIS_TO_PMU_INT_L11002BAT_SNS E1 ACT_DIODE E2 PGND PGND PGND PGND HDQ_HOST G1 HDQ_GAUGE F2IN181% 1/32W MF 010051C2306100PFROOM=CHARGER1C23032.2UFROOM=CHARGER1C23042.2UFROOM=CHARGERB5ROOM=CHARGERF3 TESTR23001100K5% 2 16V NP0-C0G 0100520% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 0201R2320OUTBUSB_VBUS_DETECT130.1K21% 1/32W MF 010053D21 20 17 14 13 12 9 8 7 6 5 3 33 29CRITICALNOSTUFF15% 1/32W MF 01005 2 ROOM=CHARGERA3 B3 D3 C3ROOM=CHARGERPP1V82G SQ2301DMN2990UFADFN0806ROOM=CHARGERR23010.00ROOM=CHARGER0% 1/32W MF 2 010051PP1V813 5 6 7 8 9 12 13 14 17 20 21 29 33DEFAULT_RESISTOR_40200OHM_2_1R230240.2K1% 1/32W MF 2 01005ROOM=CHARGERSWI_AP_BI_TIGRISBI8 9ASYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASYSTEM POWER:CHARGERDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED23 OF 49SHEET17 OF 5987654321 87654321DDCBATTERY CONNECTORTHIS ONE ON MLB ---> 516S00104 (RCPT) 516S00105 (PLUG)CPP_BATT_VCCROOM=BATTERY_B2BCRITICALVOLTAGE=4.3V 13 17C241056PF1C2411100PF1C2412220PFJ2400RCPT-BATT-2BLADESF-ST-SM 11 7 85% 2 16V NP0-C0G 01005ROOM=BATTERY_B2B5% 2 16V NP0-C0G 01005ROOM=BATTERY_B2B10% 2 10V X7R-CERM 01005ROOM=BATTERY_B2BR240017BITIGRIS_TO_BATTERY_SWI110015 2 62 1TIGRIS_BATTERY_SWI_CONN3 45% 1/32W MF 01005ROOM=BATTERY_B2BC240056PF9 10 12ROOM=BATTERY_B2BSHORT-10L-0.25MM-SM 1 2ROOM=BATTERY_B2BXW2400VBATT_SENSEOUT175% 2 16V NP0-C0G 01005PLACE_NEAR=JmmBBASYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASYSTEM POWER:BATTERY CONNDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED24 OF 49SHEET18 OF 5987654321 87654321DCARBON - ACCEL & GYROINVENSENSE (APN: 338S0087)PP1V8_IMU_OWL1 16 1MAGNESIUM - COMPASSALPS (APN:338S00084)PP1V8_IMU_OWLNOSTUFF12 14 19D112 14 19C3002100PFROOM=MAGNESIUM1C30010.1UFROOM=MAGNESIUM1C30002.2UFROOM=MAGNESIUMC4C30100.1UFROOM=CARBON1C30122.2UFROOM=CARBONVDD5% 2 16V NP0-C0G 0100520% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0201VDDVDDIO20% 2 6.3V X5R-CERM 0100520% 2 6.3V X5R-CERM 0201U3000HSCDTD601A-19NC33 31 30 27 15U3010MPU-6700-12-COMBOLGA9C2 VPP B1 B3 D1 D2 RSV RSV RSV RSV1.09M INT PULGASDO B4 SDA/SDI A4 SCL/SCK A3 CSB A2114K INT PUSPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_COMPASS_CS_LNCOUT IN IN IN9 19PP3V0_TRISTARNOSTUFF9 19INSPI_OWL_TO_ACCEL_GYRO_CS_L GYRO_CHARGE_PUMP5 8 14 7CS FSYNC/GND REGOUT/GND_CAPSCL/SPC SDA/SDI SA0/SDO2 3 4SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI SPI_IMU_TO_OWL_MISO ACCEL_GYRO_TO_OWL_INT11 IN IN OUT9 19 9 19 9 19C30080.1UF19 14 12NC9 19C30130.1UFROOM=CARBON20% 2 6.3V X5R-CERM 01005ROOM=MAGNESIUM9PP1V8_IMU_OWLD4 RST*TRG/SE C3114K INT PD1910% 6.3V 2 X6S 0201OUTACCEL_GYRO_TO_OWL_INT2DRDY/INT1 6 INT/INT2 OMIT_TABLEROOM=CARBONOUT9DRDY A1ROOM=MAGNESIUMCOMPASS_TO_OWL_INTNOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFFOUT9*NOTE: B1, D1, D2 connections are for AKM backup only. 15 GND6CRITICALVSS C1CRITICAL9 GND1 10 GND2 11 GND3 12 GND4 13 GND51C300356PF1C300456PFROOM=MAGNESIUM1C300556PF1C300656PF1C3007100PFROOM=MAGNESIUMC5% 2 16V NP0-C0G 01005ROOM=MAGNESIUM5% 2 16V NP0-C0G 010055% 2 16V NP0-C0G 01005ROOM=MAGNESIUM5% 2 16V NP0-C0G 01005ROOM=MAGNESIUM5% 2 16V NP0-C0G 01005CDISCRETE ACCELBOSCH (APN: 338S1163)19 14 12PHOSPHOROUSBOSCH (APN:338S00044)PP1V8_IMU_OWL112 14 19PP1V8_IMU_OWL1BC30312.2UFOMIT_TABLE1C30320.1UF20% 2 6.3V X5R-CERM 020120% 2 6.3V X5R-CERM 01005 OMIT_TABLE 8 7C30200.1UFROOM=PHOSPHORUS1C30211.0UFROOM=PHOSPHORUSB20% 2 6.3V X5R-CERM 01005 VDD VDDIO 820% 2 6.3V X5R 0201-1U3030BMA282LGA96ROOM=PHOSPHORUSCRITICALVDD VDDIOSPI_OWL_TO_DISCRETE_ACCEL_CS_L4 CS*SCX 1 SDX 2 OMIT_TABLE SDO 3SPI_OWL_TO_IMU_SCLK 9 19 SPI_OWL_TO_IMU_MOSI 9 19 SPI_IMU_TO_OWL_MISO_R19 9R30321IN IN IN19 920.0 25% 1/32W MF 01005SPI_IMU_TO_OWL_MISO 9199SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_PHOSPHOROUS_CS_LNOSTUFF NOSTUFF NOSTUFF3 SDI 4 SCK 2 CS*BMP282BCLGA70K INT PUU3020SDO 5 1SPI_IMU_TO_OWL_MISONOSTUFFOUT9 19GND 1 7C302256PFROOM=PHOSPHORUSR30309DISCRETE_ACCEL_TO_OWL_INT1120.0 25% 1/32W MF 01005CRITICAL DISCRETE_ACCEL_TO_OWL_INT1_R DISCRETE_ACCEL_TO_OWL_INT2_R6 INT1 5 INT2 GND 9 11 12 14 GNDIO 10 PS 13OMIT_TABLE1C302356PFROOM=PHOSPHORUS1C302456PFROOM=PHOSPHORUS1C302556PFROOM=PHOSPHORUS5% 2 16V 01005OMIT_TABLE5% 2 16V NP0-C0G 010055% 2 16V NP0-C0G 010055% 2 16V NP0-C0G 01005NOSTUFFR3020PHOSPHORUS_TO_OWL_IRQ_R1 010050.00 20%PHOSPHORUS_TO_OWL_IRQ91/32W MFROOM=PHOSPHORUSR30319DISCRETE_ACCEL_TO_OWL_INT2120.0 25% 1/32W MF 01005R3020 SHOULD BE STUFFED FOR ST PHOSPHORUS ONLY. FOR BOSCH PHOSPHORUS, PINS 1 AND 7 ARE SHORTED INTERNALLY, SO NO NEED FOR 0-OHM TO GROUND OPTION ON PIN 7.AOMIT_TABLESYNC_MASTER=N/APAGE TITLESYNC_DATE=N/AASENSORS:MOTION SENSORSDRAWING NUMBER SIZEApple Inc.R051-1902REVISIONDA.0.0BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED30 OF 49SHEET19 OF 5987654321 876543THIS ONE ON MLB ---> 516S00048 (RCPT) 516S00049 (PLUG)21FOREHEAD FLEX (FCAM)CAMERA POWERD29 21 17 14 13 12 9 8 7 6 5 3 33PROX & ALS POWER20 15FOREHEAD CONNECTORJ3100AA20L-S036VA1F-ST-SM41 37 38 1PP3V0_PROX_IRLED1C3120100PFROOM=CG_B2B1C31210.1UFROOM=CG_B2BC31222.2UFROOM=CG_B2B1C31232.2UFROOM=CG_B2B1C31242.2UFROOM=CG_B2B20 20 205% 2 16V NP0-C0G 0100520% 2 6.3V X5R-CERM 010}